Method of producing sheets of crystalline material and devices made therefrom

• US 5,549,747 A
• Filed: 04/14/1994
• Issued: 08/27/1996
• Est. Priority Date: 04/10/1980
• Status: Expired due to Fees

• Current Assignee: Massachusetts Institute of Technology
• Original Assignee: Massachusetts Institute of Technology
• Inventors: McClelland, Robert W., Bozler, Carl O., Fan, John C. C.
• Primary Examiner(s): KUNEMUND, ROBERT M
• Application Number:
  US08/227,486
• Time in Patent Office: 866 Days
• Field of Search: 437/84, 437/89, 117/7, 117/9, 117/10, 117/43, 117/44, 117/45, 117/956, 117/952
• US Class Current: 117/43
• CPC Class Codes: C30B 25/04 Pattern deposit, e.g. by using masks
• CPC Class Codes: C30B 29/60 characterised by shape
• CPC Class Codes: C30B 33/00 After-treatment of single crystals or homogeneous polycrystalline material with defined structure C30B31/00 takes precedence
• CPC Class Codes: H01L 21/02002 Preparing wafers
• CPC Class Codes: H01L 21/02381 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02461 Phosphides
• CPC Class Codes: H01L 21/02463 Arsenides
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02543 Phosphides
• CPC Class Codes: H01L 21/02546 Arsenides
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02639 Preparation of substrate for selective deposition
• CPC Class Codes: H01L 21/02647 Lateral overgrowth
• CPC Class Codes: H01L 21/2007 Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer H01L21/2011 takes precedence; bonding of semiconductor wafers to semiconductor wafers for junction formation H01L21/187
• CPC Class Codes: H01L 2221/68318 Auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 31/043 Mechanically stacked PV cells
• CPC Class Codes: H01L 31/0687 Multiple junction or tandem solar cells
• CPC Class Codes: H01L 31/18 Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
• CPC Class Codes: H01L 31/1804 : comprising only elements of Group IV of the Periodic Table
• CPC Class Codes: H01L 31/184 : the active layers comprising only AIIIBV compounds, e.g. GaAs, InP
• CPC Class Codes: H01S 5/0207 : Substrates having a special shape
• CPC Class Codes: H01S 5/0217 : Removal of the substrate
• CPC Class Codes: Y02E 10/544 : Solar cells from Group III-V materials
• CPC Class Codes: Y02E 10/547 : Monocrystalline silicon PV cells
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product
• CPC Class Codes: Y10S 117/902 : Specified orientation, shape, crystallography, or size of seed or substrate
• CPC Class Codes: Y10S 117/904 : Laser beam
• CPC Class Codes: Y10S 117/905 : Electron beam
• CPC Class Codes: Y10S 117/915 : Separating from substrate
• CPC Class Codes: Y10S 148/026 : Deposition thru hole in mask
• CPC Class Codes: Y10S 148/048 : Energy beam assisted EPI growth
• CPC Class Codes: Y10S 148/054 : Flat sheets-substrates
• CPC Class Codes: Y10S 148/09 : Laser anneal
• CPC Class Codes: Y10S 148/135 : Removal of substrate
• CPC Class Codes: Y10S 438/977 : Thinning or removal of substrate

Abstract

A method of producing sheets of crystalline material is disclosed, as well as devices employing such sheets. In the method, a growth mask is formed upon a substrate and crystalline material is grown at areas of the substrate exposed through the mask and laterally over the surface of the mask to form a sheet of crystalline material. This sheet is optionally separated so that the substrate can be reused. The method has particular importance in forming sheets of crystalline semiconductor material for use in solid state devices.

Claims

1. A process for forming an essentially single crystal region of a semiconductor material comprising:

forming a non-single crystal region on a composite structure having an insulating mask formed over a substrate, the mask having an upper surface defining a plane above the substrate and having an opening to expose a surface portion of a single crystal material positioned below the plane of the insulating mask upper surface such that said non-single crystal region contacts the single crystal material surface portion below the plane of the mask upper surface;

heating the non-single crystal region with a first heater positioned below the substrate and second heater positioned above the non-single crystal region to initiate growth of the essentially single crystal region at the exposed surface portion of the single crystal material; and

propagating the growth of the essentially single crystal region such that the single crystal region overlies at least a portion of the insulating mask.

2. The process of forming an essentially single crystal region of a semiconductor material of claim 1 wherein the single crystal region comprises gallium arsenide.

3. The process of forming an essentially single crystal region of a semiconductor material of claim 1 wherein said heating step further comprises providing a second heater including a graphite strip heater to crystallize the region.

4. The process of forming an essentially single crystal region of a semiconductor of claim 1 further comprising separating the grown single crystal region from the substrate.

11. The process of forming an essentially single crystal region of semiconductor material of claim 1 wherein the non-single crystal region comprises amorphous or polycrystalline silicon.

5. A method of forming an essentially single crystal region of semiconductor material comprising:

forming a substrate with a region of single crystal material exposed through an opening in an insulating layer that is positioned over the substrate such that the exposed region is positioned in a plane under the insulating layer;

forming a non-single crystal region of semiconductor material over the insulating layer and in contact with the exposed single crystal region;

heating the non-single crystal material with a first heater positioned below the substrate and a second heater above the semiconductor material to initiate growth of the essentially single crystal region at the exposed region of single crystal material; and

propagating the growth of the essentially single crystal region such that the essentially single crystal region grows laterally over at least a portion of the insulating layer.

6. The method of claim 5 further comprising separating the essentially single crystal material from the substrate.

7. A process for forming an essentially single crystal region of semiconductor material comprising:

forming a non-single crystal region over a substrate having an insulating layer formed over the substrate, the insulating layer exposing a single crystal material such that said non-single crystal region contacts the layer and the single crystal material in a plane underlying the insulating layer;

providing a first heater below a substrate and a second heater above the non-single crystal region;

heating the non-single crystal region with sufficient energy from the first heater and the second heater to initiate growth of an essentially single crystal region at the contact region between the non-single crystal region and the single crystal material;

propagating the growth of the single crystal region such that the single crystal region overlies at least a portion of the insulating layer; and

separating the single crystal region from the substrate.

8. The process of forming an essentially single crystal region of a semiconductor material of claim 7 wherein the single crystal region comprises gallium arsenide.

9. The process of forming an essentially single crystal region of a semiconductor material of claim 7 wherein the single crystal region comprises silicon.

10. The process of forming an essentially single crystal region of semiconductor material of claim 7 wherein the separating step further comprises transferring the single crystal region of a second substrate.