System and Method for assigning addresses to I/O devices in a control network and for verifying the assigned address of the devices
First Claim
1. A system for assigning addresses to input/output (I/O) devices in a control network, and for verifying addresses assigned to the I/O devices, comprising:
- a logic controller providing memory into which a connectivity map may be programmed, said connectivity map defining a specific expected address for each I/O device in the network, said logic controller further providing an external controller bus and logic for downloading said connectivity map to an I/O bus manager connected to said logic controller via said external controller bus, said I/O bus manager providing a mechanism for assigning said specific addresses to said I/O devices;
at least one node processor connected to said I/O bus manager, said at least one node processor including a multiplexer for multiplexing output signals from said I/O bus manager and a demultiplexer for demultiplexing input signals from said I/O devices; and
at least one I/O cluster processor connected to each of said at least one node processor, said at least one I/O cluster processor including a multiplexer for multiplexing input signals from said I/O devices and a demultiplexer for demultiplexing output signals from said at least one node processor;
said at least one I/O cluster processor including (i) a manager;
(ii) a visual indicator for displaying the address device for manually requesting an address from said I/O bus assigned by said I/O bus manager; and
(ii) a device for manually rejecting said address assigned to it by said I/O bus manager if said assigned address is not the expected address for said I/O cluster process defined in said connectivity map.
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Accused Products
Abstract
A method and system is provided for assigning addresses to input/output (I/O) devices in a control network, and for verifying addresses assigned to the I/O devices. The system comprises a logic controller providing memory into which a connectivity map may be programmed. The connectivity map defines a specific expected address for each I/O device in the system. The logic controller further provides an external controller bus and logic for downloading the connectivity map to an I/O bus manager connected to the logic controller via the external controller bus. The I/O bus manager provides logic for assigning the specific addresses to the I/O devices. Network nodes connect the I/O bus manager to I/O cluster units in the system, each network node including a multiplexer for multiplexing output signals from the I/O bus manager and a demultiplexer for demultiplexing input signals from the I/O cluster units, the multiplexing/demultiplexing functions provided by a controller area network (CAN) integrated circuit. Each I/O cluster unit includes a multiplexer for multiplexing input signals from the I/O devices and a demultiplexer for demultiplexing output signals from its associated network node, the multiplexing/ demultiplexing functions again provided by a controller area network (CAN) integrated circuit. Each I/O cluster unit provides means for manually requesting address assignments and a visual indication of addresses so assigned. Each I/O cluster unit also provides means to manually reject the address assigned to it by the I/O bus manager if the assigned address is not the expected address for the I/O cluster processor defined in the connectivity map.
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Citations
23 Claims
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1. A system for assigning addresses to input/output (I/O) devices in a control network, and for verifying addresses assigned to the I/O devices, comprising:
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a logic controller providing memory into which a connectivity map may be programmed, said connectivity map defining a specific expected address for each I/O device in the network, said logic controller further providing an external controller bus and logic for downloading said connectivity map to an I/O bus manager connected to said logic controller via said external controller bus, said I/O bus manager providing a mechanism for assigning said specific addresses to said I/O devices; at least one node processor connected to said I/O bus manager, said at least one node processor including a multiplexer for multiplexing output signals from said I/O bus manager and a demultiplexer for demultiplexing input signals from said I/O devices; and at least one I/O cluster processor connected to each of said at least one node processor, said at least one I/O cluster processor including a multiplexer for multiplexing input signals from said I/O devices and a demultiplexer for demultiplexing output signals from said at least one node processor; said at least one I/O cluster processor including (i) a manager;
(ii) a visual indicator for displaying the address device for manually requesting an address from said I/O bus assigned by said I/O bus manager; and
(ii) a device for manually rejecting said address assigned to it by said I/O bus manager if said assigned address is not the expected address for said I/O cluster process defined in said connectivity map. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A method of assigning addresses to input/output (I/O) devices in a control network, and for verifying addresses assigned to the I/O devices, comprising the steps of:
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allocating specific expected addresses to each of the I/O devices in the control network to define a connectivity map, storing said connectivity map into memory of a logic controller; downloading said connectivity map to an I/O bus manager connected to said logic controller via an external controller bus, manually requesting assignment of one of said specific addresses with one of said I/O devices; assigning one of said specific addresses to said requesting I/O device using said I/O manager; visually displaying the address assigned by said I/O bus manager; and manually rejecting said address assigned to said requesting I/O device by said I/O bus manager to zero said assigned address if said assigned address is not the expected address for said I/O device defined in said connectivity map. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23)
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Specification