Thin film transistor redundancy structure

• US 5,552,743 A
• Filed: 09/27/1994
• Issued: 09/03/1996
• Est. Priority Date: 09/27/1994
• Status: Expired due to Term

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Manning, Monte
• Primary Examiner(s): Nguyen, Viet Q.
• Application Number:
  US08/313,627
• Time in Patent Office: 707 Days
• Field of Search: 365/200, 365/201, 365/225.7, 365/96, 327/567, 327/518, 327/520, 327/525, 327/526, 327/581
• US Class Current: 327/567
• CPC Class Codes: G11C 17/18 Auxiliary circuits, e.g. for writing into memory
• CPC Class Codes: G11C 29/789 using non-volatile cells or latches

Abstract

In a microcircuit device such as a memory chip, where a bank of state devices such as fuses and anti-fuses determine the enabling and disabling of redundant circuitry, a scheme for blowing one or more state devices by applying a programming voltage through a switching circuit comprising thin film transistors (TFTs) which are not damaged by the device blowing, programming voltage. The TFTs can be activated by a low voltage enable signal provided by a state device designator logic module.

Claims

1. In a microcircuit device wherein a voltage differential is applied to at least one element of said microcircuit device, said voltage differential being incompatible with a plurality of said microcircuit components;

means for isolating said components from said voltage differential, which comprise;

at least one first TFT switching circuit adapted to apply said voltage differential to said element; and

at least one second TFT switching circuit adapted to separate said components from said voltage differential.

2. The structure of claim 1 which further comprises:

a first supply voltage compatible with said components;

a second supply voltage, wherein said voltage differential is taken between said first and second supply voltages; and

wherein said element comprises a state device having a current conductivity alterable by an application of said voltage differential thereacross.

3. The structure of claim 2, wherein said first TFT switching circuit comprises a first TFT switch having a first control gate, said first TFT switch being wired in series with said state device between said first and second supply voltages;

and wherein said second TFT switching circuit comprises;

a second TFT switch having a second control gate wired to a first terminal adapted to receive an element status interrogating signal,

said second TFT switch being wired in series with said state device between said first supply voltage and an output terminal.

4. The structure of claim 3, wherein said second TFT switching circuit further comprises:

a TFT diode back-wired between said second control gate and said second voltage supply.

5. The structure of claim 4, wherein said first TFT switching circuit further comprises a third TFT switch having a third control gate adapted to receive a program enabling signal for said element, wherein said third TFT switch has a first current-carrying terminal connected to said first supply voltage and a second current-carrying terminal connected to said first control gate.

6. The structure of claim 2, wherein said first TFT switching circuit comprises a first TFT switch having a first control gate, said first TFT switch being wired in series with said state device between said first and second supply voltages;

and wherein said second TFT switching circuit comprises;

a second TFT switch having a second control gate wired to a first terminal adapted to receive an element status interrogating signal,

said second TFT switch being wired in series with said state device between said second supply voltage and an output terminal.

7. The structure of claim 6, wherein said second TFT switching circuit further comprises:

a TFT diode back-wired between said second control gate and said second voltage supply.

8. The structure of claim 7, wherein said first TFT switching circuit further comprises a third TFT switch having a third control gate adapted to receive a program enabling signal for said element, wherein said third TFT switch has a second current-carrying terminal connected to said second supply voltage and a first current-carrying terminal connected to said first control gate.

9. The structure of claim 3, wherein said microcircuit device further comprises:

at least one third TFT switching circuit adapted to unidirectionally conduct current between said second control gate and said second supply voltage.

10. The structure of claim 1, wherein said microcircuit device is an SRAM integrated circuit having a memory cell, said memory cell having a load element, said load element being a load TFT, wherein

said first TFT switching circuit comprises a first TFT switch;

said second TFT switching circuit comprises a second TFT switch; and

said first and second TFT switches have been fabricated simultaneously during processing steps required to create said load TFT.

11. The structure of claim 2, wherein said state device is a bulk complimentary metal-oxide-substrate capacitor.

12. The structure of claim 2, wherein said state device is selected from a group consisting of:

resistors;

interpoly capacitors; and

intermetal capacitors.

13. The structure of claim 5, wherein said program enabling signal is produced by a state device designator logic module wired to said third control gate.

14. The structure of claim 13, wherein said state device designator logic module comprises:

means for enabling a programming mode;

means for interpreting memory array addresses corresponding to said element.

15. The structure of claim 6, wherein said microcircuit device further comprises:

at least one third TFT switching circuit adapted to unidirectionally conduct current between said second control gate and said second supply voltage.