High speed I.sub.DDQ monitor circuit

• US 5,552,744 A
• Filed: 06/05/1995
• Issued: 09/03/1996
• Est. Priority Date: 08/11/1994
• Status: Expired due to Term

• Current Assignee: Xcerra Corporation (COHU Incorporated)
• Original Assignee: LTX Corp. (COHU Incorporated)
• Inventors: Burlison, Phillip D., Pogrebinsky, Victor, DeHaven, William R.
• Primary Examiner(s): Nelms, David C.
• Assistant Examiner(s): PHAN, TRONG Q
• Application Number:
  US08/472,070
• Time in Patent Office: 456 Days
• Field of Search: 327/395, 327/396, 327/400, 327/401, 327/403, 327/404, 327/566, 327/581, 327/108
• US Class Current: 327/401
• CPC Class Codes: G01R 31/3004 Current or voltage test
• CPC Class Codes: G01R 31/3008 Quiescent current [IDDQ] test or leakage current test
• CPC Class Codes: G01R 31/3193 with comparison between actual response and known fault free response receiver details G01R31/31924

Abstract

A process for determining a quiescent power supply current (I_DDQ) of a device under test (DUT) at a first node. The process includes the steps of providing a reference current to the first node and decoupling a power supply from the first node. A first node voltage is determined at a first time after the power supply is decoupled from the first node. The first node voltage is determined at a second time after the first time. If the first node voltage increases from the first time to the second time, it is indicated that the I_DDQ of the DUT is less than the reference current. If the first node voltage decreases from the first time to the second time, it is indicated that the I_DDQ of the DUT is greater than the reference current.

Claims

1. A process for reducing charge injection when decoupling a power supply from a first node, comprising the steps of:

providing n switches coupled in parallel between the power supply and the first node, each of the n switches having a different resistance when closed; and

sequentially opening each of the n switches, wherein a first switch having a lowest resistance is opened first and each successive switch that is opened has a greater resistance than a previous switch that has been previously opened.

2. A process for reducing charge injection when decoupling a power supply from a first node, comprising the steps of:

providing a first switch having a first resistance, the first switch being coupled between the power supply and the first node;

providing a second switch having a second resistance that is greater than the first resistance, the second switch being coupled in parallel to the first switch;

providing a third switch having a third resistance that is greater than the second resistance, the third switch being coupled in parallel to the first and second switches;

opening the first switch;

opening the second switch after the first switch is opened; and

opening the third switch after the second switch is opened, wherein the power supply is decoupled from the first node when all three switches are open.

3. A switch circuit for coupling and decoupling a first node to a second node, the switch circuit having reduced charge injection, comprising:

a plurality of switches coupled between the first node and the second node, each switch having a unique resistance when switched on, each switch being controlled independently, wherein a switch having a lowest resistance is switched off first and successive switches are sequentially switched off according to which switch has a next lowest resistance until all switches are switched off such that the first node is decoupled from the second node.

4. The switch circuit of claim 3, wherein a switch having a greatest resistance is switched on first and successive switches are sequentially switched on according to which switch has a next greatest resistance until all switches are switched on such that the first node is coupled to the second node.

5. A switch circuit for coupling and decoupling a first node to a second node, the switch circuit having reduced charge injection, comprising:

a plurality of switches coupled between the first node and the second node, each switch having a unique resistance when switched on and being controlled independently, wherein a switch having a lowest resistance is switched off first and successive switches are sequentially switched off, each after a predetermined interval of time has elapsed from a previous switch being switched off, according to which switch has a next lowest resistance until all switches are switched off such that the first node is decoupled from the second node.

6. The switch circuit of claim 5, wherein a switch having a greatest resistance is switched on first and successive switches are sequentially switched on, each after a predetermined interval time has elapsed from a previous switch being switched on, according to which switch has a next greatest resistance until all switches are switched on such that the first node is coupled to the second node.

7. A process for reducing charge injection when decoupling a power supply from a first node, comprising the steps of:

providing n switches coupled in parallel between the power supply and the first node, each of the n switches having a different resistance when closed; and

sequentially opening each of the n switches after a predetermined interval of time has elapsed from a previous switch being opened to compensate for charge injection due to opening the previous switch, wherein a first switch having a lowest resistance is opened first and each successive switch that is opened has a greater resistance than a previous switch that has been previously opened.

8. A process for reducing charge injection when coupling a power supply to a first node, comprising the steps of:

providing n switches coupled in parallel between the power supply and the first node, each of the n switches having a different resistance when closed; and

sequentially closing each of the n switches after a predetermined interval of time has elapsed from a previous switch being closed to compensate for charge injection due to closing the previous switch, wherein a first switch having a highest resistance is closed first and each successive switch that is closed has a lower resistance than a previous switch that has been previously closed.