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Write-once read-many memory using EEPROM cells

  • US 5,553,019 A
  • Filed: 01/23/1995
  • Issued: 09/03/1996
  • Est. Priority Date: 01/23/1995
  • Status: Expired due to Term
First Claim
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1. A write-once read-many memory system comprising:

  • a first memory cell for providing electronic storage of information;

    a second memory cell for controlling writing access to said first memory cell;

    access means for providing access to said second memory cell;

    a first bus connected to said first memory cell and said second memory cell for proving read logic information;

    a second bus connected to said first memory cell and said second memory cell for providing write logic information;

    a third bus connected to said first memory cell and said second memory cell for providing erase information;

    wherein said access means comprises;

    a first logic gate for controlling access to said second bus;

    a second logic gate for controlling access to said third bus; and

    a third logic gate for controlling access to said first logic gate and said second logic gate; and

    wherein said second memory cell provides selective access to said first memory cell to allow said first memory cell to write or erase said information when said second memory cell is in an appropriate logic state and further wherein said third logic gate includes an input for receiving logic information from said second memory cell and a test node.

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