Accessory control device which transfers data from electronic device using part of address signal and latch

• US 5,553,202 A
• Filed: 07/08/1992
• Issued: 09/03/1996
• Est. Priority Date: 03/19/1992
• Status: Expired due to Term

• Current Assignee: Seiko Epson Corporation (Seiko Group)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Wakabayashi, Kenichi, Takayama, Chitoshi, Shiozaki, Tadashi
• Primary Examiner(s): Bayerl, Raymond J.
• Assistant Examiner(s): SAX, STEVEN PAUL
• Application Number:
  US07/910,590
• Time in Patent Office: 1,518 Days
• Field of Search: 395/115, 395/110, 395/116, 395/119, 395/162, 358/296, 900/70
• US Class Current: 358/1.16
• CPC Class Codes: G06F 5/06 for changing the speed of data flow, i.e. speed regularising or timing, e.g. delay lines, FIFO buffers; over- or underrun control therefor G06F7/78 takes precedence
• CPC Class Codes: G06K 15/00 Arrangements for producing a permanent visual presentation of the output data , e.g. computer output printersprinting or plotting combined with another operation, e.g. with conveying, G06K17/00
• CPC Class Codes: G06K 2215/0082 Architecture adapted for a particular function

Abstract

An accessory control device, also called a cartridge, is coupled to an electronic device, such as a printer, and a large amount of data is transferred from the electronic device to the accessory control device. An electronic control device within the electronic device reflects the data it is transferring to cartridge 3 installed in a slot of a printer in the lower 8 bits of the address signal line (CAB) and outputs the data. Data corresponding to this address are read from ROM 671 according to this address specification and held in latch 657. The cartridge is internally equipped with a FIFO memory 621, and when register FIFOREQ of the FIFO write registers is accessed, the data being held in latch 657 is written to FIFO memory 621 and the address counter for writing is incremented. The transfer of multiple bytes of data from the electronic device is completed by repeating this process. By means of a configuration that utilizes signal/FIFOWR, which is output by accessing register FIFOWR that specifies the setting of data in latch 657 as the signal/FIFOREQ, data can be transferred in a single access.

Claims

1. An information processing device comprising:

a) an electronic device comprising a first processor capable of logic operation, a first memory means for storing the programs executed by the processor and a connector connected to address signal and data signal lines of the first processor; and

b) an accessory control device connected to the connector;

wherein

the electronic device further comprises a multiple data output means that sequentially outputs multiple data to be transferred to the accessory control device;

the accessory control device comprises a memory means for storing the written data in a prescribed order; and

a data write means that writes the multiple data output from the electronic device to the memory means for transfer;

said multiple data output means of said electronic device is a transfer data output means that transfers the data to be output exclusively as part of an address signal and outputs the address signal via the address signal line of the connector; and

the accessory control device further comprises a data hold means that fetches and holds the data reflected in the address signal output from the electronic device, and a write drive means that operates the data write means at a prescribed timing when data is being held in the data-hold means.

2. The information processing device claim 1 wherein said accessory control device further comprises a second processor that executes processing separate from said first processor and a second memory means that stores routines executed by said second processor.

3. The information processing device of claim 1 wherein the memory means is a first-in first-out semiconductor memory.

4. The information processing device of claim 1 wherein

the transfer data output means of the electronic device is equipped with a signal conversion means that reflects the data to be transferred in the address signal;

and

the data-hold means of the accessory control device is equipped with

fetch means that reads the address signal output by the transfer data output means,

data restoration means that restores the data from the address signal, and

hold means that holds the restored data.

5. The information processing device of claim 1 wherein the accessory control device is equipped with a third memory means that stores the routine which is executed by the first processor in the electronic device and is equivalent to the multiple data output means of the electronic device.

6. The information processing device of claim 2 wherein

the accessory control device is configured as a cartridge equipped with a printed circuit board on which is mounted at least the second processor and having a case for housing the printed circuit board to facilitate its use as a single unit.

7. The information processing device of claim 6 wherein the second processor is positioned for effective radiation of heat while the accessory control device is mounted in the electronic device.

8. The information processing device of claim 1 wherein

the accessory control device processes the data fetched by the data fetch means and is equipped with a means that outputs the data after being processed to the electronic device.

17. The information processing device of claim 1 wherein the electronic device further comprises a display means for displaying at least characters, graphics or color, and

the accessory control device is equipped with an image data generation means that generates image data displayed on the above device based on data transferred from the electronic device.

18. The information processing device of claim 17 wherein the electronic device is a printer that receives print data and prints it.

9. An accessory control device that is connected via a connector having address signal and data signal lines to an electronic device equipped with a first processor capable of logic operation and a first memory means that stores the processing executed by the processor, wherein the accessory control device includes:

a memory means that stores data transferred from the electronic device in a prescribed order, and

data write means that writes data transferred from the electronic device in the memory means, wherein

the electronic device transfers data to the accessory control device exclusively as part of an address signal via the address signal line of the connector, and

the accessory control device further includes;

a data hold means that fetches and holds the data from the address signal, and

write drive means that operates the data write means at a prescribed timing when data is being held in the data hold means.

10. The accessory control device of claim 9 wherein

the accessory control device is equipped with a second processor that executes processing separate from the first processor of the electronic device and a second memory means that stores routines executed by the second processor, and

that the second processor reads out data from the memory means for transfer and also processes at least part of the data read out.

11. The accessory control device of claim 10 wherein

the memory means for transfer is a first-in first-out semiconductor memory.

12. The accessory control device of claim 9 wherein

the data hold means is equipped with fetch means that reads the address signal, and

data restoration means that restores the data from the address signal.

13. The accessory control device of claim 9 wherein the accessory control device is equipped with a third memory means which stores the routine executed by the first processor in the electronic device and which is the routine that outputs the address signal in at least part of which the data to be transferred have been reflected.

14. The accessory control device of claim 10 wherein

the accessory control device is configured as a cartridge equipped with a printed circuit board on which is mounted at least the second processor and having a case for housing the printed circuit board to facilitate its use as a single unit.

15. The accessory control device of claim 14 wherein the second processor is positioned for effective radiation of heat while the accessory control device is mounted in the electronic device.

16. The accessory control device of claim 9 wherein the accessory control device processes the data transferred to the memory means for transfer and is equipped with a means that outputs the data after being processed to the electronic device.

19. The accessory control device of claim 9 wherein

the accessory control device further comprises an image data developing means that develops image data based on data received from the electronic device.

20. An electronic device, comprising:

a processor;

a bi-directional address bus in communication with said processor for transferring address data;

an interface connector in communication with said address bus for removably receiving and electrically connecting an accessory control device;

a unidirectional, read-only data bus in communication with said processor and said accessory control device via said interface connector for transferring peripheral device data from the accessory control device to said processor; and

a data driver in communication with said processor and said address bus for encoding electronic device data in an address data format, latching the encoded electronic device data onto said address bus, and transmitting the latched, encoded electronic device data to the accessory control device according to a predetermined address timing sequence.

21. The electronic device of claim 20, wherein the accessory control device comprises a data hold circuit in communication with said address bus for decoding the encoded electronic device data transmitted by said data driver according to the predetermined address timing sequence and latching the decoded electronic device data for accessory control device use.

22. The electronic device of claim 21, wherein the accessory control device further comprises:

a memory; and

a data write circuit in communication with the data hold circuit and the memory for transferring the decoded electronic device data held by the data hold to the memory according to a prescribed order and transfer timing sequence.