Method of and apparatus for controlling modulation of digital signals in frequency-modulated transmissions

• US 5,555,276 A
• Filed: 03/04/1994
• Issued: 09/10/1996
• Est. Priority Date: 01/18/1990
• Status: Expired due to Term

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Norand Corporation (Baker Hughes Company)
• Inventors: Mahany, Ronald L., Koenck, Steven E., Frede, William W.
• Primary Examiner(s): Chin, Stephen
• Assistant Examiner(s): VO, DON NGUYEN
• Application Number:
  US08/205,639
• Time in Patent Office: 921 Days
• Field of Search: 375/303, 375/223, 375/376, 455/113, 455/115, 455/116, 332/100, 332/117, 332/123, 332/127, 332/128
• US Class Current: 375/303
• CPC Class Codes: B60R 11/02 for radio sets, television sets, telephones, or the like; Arrangement of controls thereof
• CPC Class Codes: B60R 11/0241 for telephones
• CPC Class Codes: G06F 1/1626 with a single-body enclosure integrating a flat display, e.g. Personal Digital Assistants [PDAs]
• CPC Class Codes: G06F 1/1632 External expansion units, e.g. docking stations
• CPC Class Codes: G06F 15/0225 User interface arrangements, e.g. keyboard, display; Interfaces to other computer systems
• CPC Class Codes: G06K 17/0022 arrangements or provisions for transferring data to distant stations, e.g. from a sensing device "transfer between computer elements G06F13/00 "; data-transmission H04L
• CPC Class Codes: G06K 7/10702 Particularities of propagating elements, e.g. lenses, mirrors G06K7/10831 takes precedence
• CPC Class Codes: G06K 7/10722 Photodetector array or CCD scanning
• CPC Class Codes: G06K 7/10841 Particularities of the light-sensitive elements semiconductor devices H01L
• CPC Class Codes: G06K 7/10851 Circuits for pulse shaping, amplifying, eliminating noise signals, checking the function of the sensing device basic electronic circuitry H03
• CPC Class Codes: G06K 7/10881 constructional details of hand-held scanners
• CPC Class Codes: G06K 7/1098 the scanning arrangement having a modular construction
• CPC Class Codes: G06K 7/12 using a selected wavelength, e.g. to sense red marks and ignore blue marks
• CPC Class Codes: G06Q 20/343 Cards including a counter
• CPC Class Codes: G07F 7/02 by keys or other credit registering devices
• CPC Class Codes: G07G 1/0045 with a code reader for reading of an identifying code of the article to be registered, e.g. barcode reader or radio-frequency identity [RFID] reader
• CPC Class Codes: H03C 3/0925 applying frequency modulation at the divider in the feedback loop
• CPC Class Codes: H03C 3/0941 applying frequency modulation at more than one point in the loop
• CPC Class Codes: H03C 3/0958 applying frequency modulation by varying the characteristics of the voltage controlled oscillator
• CPC Class Codes: H03C 3/0966 modulating the reference clock
• CPC Class Codes: H03C 3/0975 : applying frequency modulation in the phase locked loop at components other than the divider, the voltage controlled oscillator or the reference clock
• CPC Class Codes: H03C 3/0991 : including calibration means or calibration methods
• CPC Class Codes: H04B 1/04 : Circuits
• CPC Class Codes: H04B 1/1615 : Switching on; Switching off, e.g. remotely battery saving circuits associated with selective call operation H04W52/00; details of power consumption reduction in a PLL, H03L7/0802, H03L7/14, H03L2207/08, H03L2207/18; muting amplifiers by gain control see H03G3/34
• CPC Class Codes: H04L 1/0002 : by adapting the transmission rate
• CPC Class Codes: H04L 1/0003 : by switching between different modulation schemes
• CPC Class Codes: H04L 1/0025 : Transmission of mode-switching indication
• CPC Class Codes: H04L 1/0032 : Without explicit signalling
• CPC Class Codes: H04L 1/1671 : the supervisory signal being transmitted together with control information
• CPC Class Codes: H04L 1/1685 : the supervisory signal being transmitted in response to a specific request, e.g. to a polling signal
• CPC Class Codes: H04L 1/18 : Automatic repetition systems, e.g. Van Duuren systems
• CPC Class Codes: H04L 27/12 : Modulator circuits; Transmitter circuits
• CPC Class Codes: H04L 27/14 : Demodulator circuits; Receiver circuits
• CPC Class Codes: H04L 27/156 : with demodulation using temporal properties of the received signal, e.g. detecting pulse width
• CPC Class Codes: H04L 69/18 : Multiprotocol handlers, e.g. single devices capable of handling multiple protocols
• CPC Class Codes: H04L 69/32 : Architecture of open systems interconnection [OSI] 7-layer type protocol stacks, e.g. the interfaces between the data link level and the physical level
• CPC Class Codes: H04L 9/40 : Network security protocols
• CPC Class Codes: H04M 7/006 : Networks other than PSTN/ISDN providing telephone service, e.g. Voice over Internet Protocol (VoIP) , including next generation networks with a packet-switched transport layer H04L65/00 takes precedence; aspects not specific to the type of network H04M3/00; special services in those networks H04M3/42
• CPC Class Codes: H04W 88/02 : Terminal devices
• CPC Class Codes: H04W 88/06 : adapted for operation in multiple networks or having at least two operational modes, e.g. multi-mode terminals

Abstract

A programmable apparatus is disclosed for generating a frequency modulated signal all a selected center frequency in accordance with digital data of at least first and second data levels. The modulating apparatus comprises a modulator having an input and an output and is responsive to an input modulation signal applied to its input for generating at its output the frequency modulated signal at a center frequency dependent on a quiescent voltage appearing at its input. A circuit is provided for sampling and storing a value of the quiescent voltage, An addressable memory stores a plurality of offsets. A programmable adding circuit adds a downloaded offset voltage to the stored value of the quiescent voltage to output a high modulation voltage. A programmable subtracting circuit subtracts a downloaded offset voltage from the stored value of the quiescent voltage to provide a low modulation voltage. An addressing circuit addresses the memory in accordance with a data transmission parameter for downloading a corresponding offset to the adding and subtracting circuits. A switch or multiplexor is coupled to the subtracting and adding circuits and to receive the digital data for generating and applying to the modulator input an input modulation signal comprising a sequence of the high and low modulation voltages in accordance respectively with the first and second data levels of the digital data.

Claims

1. Programmable apparatus for generating a frequency modulated signal at a selected center frequency in accordance with digital data of at least first and second data levels, said apparatus comprising:

a) a modulator having an input and an output and being responsive to an input modulation signal applied to its input for generating at its output the frequency modulated signal at a center frequency dependent on a quiescent voltage appearing at its input;

b) means for sampling and storing a value of the quiescent voltage;

c) addressable means for storing a plurality of offsets;

d) programmable means for adding a downloaded offset voltage to the stored value of the quiescent voltage to output a high modulation voltage;

e) programmable means for subtracting a downloaded offset voltage from the stored value of the quiescent voltage to provide a low modulation voltage;

f) means for addressing in accordance with a data transmission parameter said addressable storing means and for downloading a corresponding offset to said adding means and said subtracting means; and

g) switch means coupled to said subtracting and adding means and to receive the digital data for generating and applying to said input of said modulator the input modulation signal comprising a sequence of the high and low modulation voltages in accordance respectively with the first and second .data levels of the digital data.

2. The programmable frequency modulated signal generating apparatus as claimed in claim 1, wherein said frequency modulated signal generating apparatus is adapted for multi-level modulation and comprises means for converting the digital data into a matching binary format, an offset reducing means, said programmable adding means comprising at least first and second adding circuits, said programmable subtracting means comprising at least first and second subtracting circuits, said addressing means addressing said addressable storing means for downloading the corresponding offset to each of said first adding and subtracting circuits and to said offset reducing means, said offset reducing means reducing the amplitude of said downloaded offset and applying said reduced amplitude offset to each of said second adding and subtracting circuits.

3. The programmable frequency modulated signal generating apparatus as claimed in claim 1, wherein said frequency modulated signal generating apparatus is adapted for m-ary modulation, where m=n² and n is any whole number, said frequency modulated signal generating apparatus further comprising means for converting the digital data into a binary format corresponding to said m-ary modulation, said adding means comprising m adding circuits, said subtracting means comprising m subtracting circuits, an offset reducing means, said addressing means addressing said addressable storing means for downloading the corresponding offset to one of said adding circuits, to one of said subtracting circuits to said offset reducing means, said offset reducing means reducing the amplitude of said downloaded offset and applying said reduced amplitude offset to other of said adding and subtracting circuits.

4. The programmable frequency modulated signal generating apparatus as claimed in claim 1, wherein said modulator operates at a selected frequency, and said data transmission parameter is the selected frequency.

5. The programmable frequency modulated signal generating apparatus as claimed in claim 1, wherein the digital data is transmitted at a selected baud rate, and said data transmission parameter is the selected baud rate.

6. A method of adjusting a signal amplitude of timed digital signals to a reference voltage, comprising:

during a period of non-transmission of such timed digital signals, sensing a bias voltage representative of an unmodulated frequency at a signal terminal of a radio transmitter of frequency modulated signals;

upon receipt of a transmit-enable signal, storing the sensed bias voltage as a reference voltage;

generating signal voltages of a predetermined negative and positive offset amplitude with respect to said stored reference voltage; and

selectively applying the generated signal voltages in sequence corresponding to a predetermined sequence of high and low data pulses of such timed digital signals to the signal terminal.

7. Apparatus for generating a frequency modulated signal at a stable center frequency in accordance with digital data, said apparatus comprising:

a) a voltage controlled oscillator having an input and an output, and being responsive to an input modulation signal for generating the frequency modulation signal at the stable center frequency at said output of said voltage controlled oscillator;

b) a phase lock loop interconnected between said input and said output of said voltage controlled oscillator and comprising a reference oscillator for generating at its output a reference frequency signal, a phase detector connected to said reference oscillator output and to said voltage controlled oscillator output for receiving the reference frequency signal and the frequency modulated signal and for providing at its output a signal indicative of the phase difference therebetween, and a filter coupled to said phase detector for filtering the phase difference signal and applying a filtered signal to said input of said voltage controlled oscillator, whereby the center frequency is stabilized; and

c) means for providing the input modulation signal as a sequence of high and low modulation level signals in accordance with the digital data and for inserting the input modulation signal into said phase lock loop, said inserting means comprises a switch inserted into said phase lock loop and operable between a closed state for completing said phase lock loop and an open state for interrupting said phase lock loop.

8. The frequency modulated signal generating apparatus as claimed in claim 7, wherein said inserting means further comprises means operable when said switch is in its closed state for capturing a control voltage appearing in said phase lock loop and when said switch is in its open state for superimposing the input modulation signal on the captured control voltage and applying same to said voltage controlled oscillator input.

9. Apparatus for generating a frequency modulated signal at a stable center frequency in accordance with digital data, said apparatus comprising:

a) a voltage controlled oscillator having an input and an output, and being responsive to an input modulation signal applied to its input for generating at its output the frequency modulation signal at the stable center frequency;

b) a phase lock loop interconnected between said input and said output of said voltage controlled oscillator and comprising a reference oscillator for generating at its output a reference frequency signal, a phase detector connected to said reference oscillator output and to said voltage controlled oscillator output for receiving the reference frequency signal and the frequency modulated signal and for providing at its output a signal indicative of the phase difference therebetween, and a filter coupled to said phase detector for filtering the phase difference signal and applying a filtered signal to said input of said voltage controlled oscillator, whereby the center frequency is stabilized;

c) means for providing the input modulation signal as a sequence of high and low modulation level signals in accordance with the digital data and for inserting the input modulation signal into said phase lock loop; and

d) a track and hold circuit coupled within said phase lock loop and operable in a track mode wherein said phase lock loop is maintained closed and a control voltage applied to said first input of said voltage controlled oscillator is sampled and stored, and a hold state wherein said phase lock loop is opened and the stored sample of the control voltage is applied to said input of said voltage controlled oscillator to maintain the center frequency of the frequency modulation signal at its center frequency.

10. The frequency modulated signal generating apparatus as claimed in claim 9, wherein said voltage controlled oscillator has a second input forming a voltage controlled oscillator modulation port, and said inserting means is coupled to said voltage controlled oscillator modulation port for applying the input modulation signal thereto.

11. Apparatus for generating a frequency modulated signal at a stable center frequency in accordance with digital data, said apparatus comprising:

a) a voltage controlled oscillator having a first input serving as a reference modulation port, a second input serving as a voltage controlled oscillator port and an output, and being responsive to an input modulation signal applied for generating at its output the frequency modulation signal at the stable center frequency;

b) a phase lock loop interconnected between said input and said output of said voltage controlled oscillator and comprising a reference oscillator for generating at its output a reference frequency signal, a phase detector connected to said reference oscillator output and to said output of said voltage controlled oscillator for receiving the reference frequency signal and the frequency modulated signal and for providing at its output a signal indicative of the phase difference therebetween, and a filter coupled to said phase detector for filtering the phase difference signal and applying at its output a filtered signal to said input of said voltage controlled oscillator, whereby the center frequency is stabilized;

c) means for providing the input modulation signal as a sequence of high and low modulation level signals in accordance with the digital data and for inserting the input modulation signal into said phase lock loop; and

d) balancing means coupled to said providing means for receiving and apportioning the input modulation signal into a first portion applied to said reference modulation port and a second portion applied to said voltage controlled oscillator modulation port, said balancing means apportioning said first and second portions independently of each other based upon a data transmission parameter, whereby the frequency modulation signal may be adjusted to account for variation in the modulation sensitivity over a range of the date transmission parameter.

12. The frequency modulated signal generating apparatus as claimed in claim 11, wherein the digital data comprise at least first and second data levels, and the frequency modulated signal is generated on said voltage controlled oscillator output at a center frequency dependent on a quiescent voltage appearing at said voltage controlled oscillator input, and said balancing means comprises:

a) a reference modulation shaping circuit and a voltage controlled oscillator modulation signal shaping circuit, each of said shaping circuits comprising an output, programmable means for adding a downloaded offset voltage to a reference voltage to output a high modulation voltage, programmable means for subtracting a downloaded offset voltage from the reference voltage to provide a low modulation voltage, and switch means coupled to said subtracting and adding means and to recieve the digital data for generating and applying to its output a corresponding one of a voltage reference or a voltage controlled oscillator modulation input signal, each comprising a sequence of high and low modulation voltages in accordance with the first and second data levels of the digital data;

b) addressable means for storing a plurality of offsets;

c) said reference modulation shaping circuit comprising means for sampling and storing a value of the quiescent voltage as said reference voltage of said reference modulation shaping circuit; and

d) means for addressing said addressable storing means and for downloading first and second sets of offsets into said adding means and said subtracting means of each of said reference modulation shaping circuit and said voltage controlled oscillator modulation shaping circuit respectively, the values of said first and second sets of offsets being selected to determine the first and second portions of said input modulation signal.

13. Apparatus for generating a frequency modulated signal at a stable center frequency in accordance with digital data, the digital data comprises at least first and second data levels, said apparatus comprising:

a) a voltage controlled oscillator having an input forming a modulation port and an output, and being responsive to an input modulation signal for generating the frequency modulation signal at the stable center frequency at said output of said voltage controlled oscillator;

b) a phase lock loop interconnected between said input and said output of said voltage controlled oscillator and comprising a reference oscillator having an input forming a reference modulation port and an output for generating a reference frequency signal at said output of said reference oscillator, a phase detector connected to said output of said reference oscillator and to said output of said voltage controlled oscillator for receiving the reference frequency signal and the frequency modulated signal and for providing at its output a signal indicative of the phase difference therebetween, and a filter coupled to said phase detector for filtering the phase difference signal and applying a filtered signal to said input of said voltage controlled oscillator, whereby the center frequency is stabilized;

c) means for providing the input modulation signal as a sequence of high and low modulation level signals in accordance with the digital data and for inserting the input modulation signal into said phase lock loop; and

d) balancing means comprising a first programmable reference modulation shaping circuit and a second programmable voltage controlled oscillator shaping circuit, each of said first and second shaping circuits having an input for receiving the digital data and for generating respectively a first reference modulation signal and a second voltage controlled oscillator modulation signal, each of said first and second modulation signals comprising a sequence of the high and low modulation voltages in accordance respectively with the first and second data levels of the digital data; and

e) means for programming distinctly the amplitudes of the high and low modulation voltages of the first and second modulation signals, whereby the first and second modulation signals are apportioned between said reference modulation port and said voltage controlled oscillator modulation port.