Method and apparatus for implementing virtual memory having multiple selected page sizes

• US 5,555,387 A
• Filed: 06/06/1995
• Issued: 09/10/1996
• Est. Priority Date: 06/06/1995
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Byrn, Jonathan W., Delp, Gary S., Plotz, Kevin G., Slane, Albert A., Safi, Fadi-Christian E., Leichty, Philip L., Branstad, Mark W.
• Primary Examiner(s): Moore, David K.
• Assistant Examiner(s): NGUYEN, THAN VINH
• Application Number:
  US08/467,266
• Time in Patent Office: 462 Days
• Field of Search: 395/412, 395/419, 395/413, 395/401, 395/418
• US Class Current: 711/209
• CPC Class Codes: G06F 12/0292 using tables or multilevel address translation means G06F12/023 takes precedence; address translation in virtual memory systems G06F12/10
• CPC Class Codes: G06F 12/10 Address translation
• CPC Class Codes: G06F 12/1009 using page tables, e.g. page table structures
• CPC Class Codes: G06F 2212/652 Page size control
• CPC Class Codes: G11B 25/043 using rotating discs
• CPC Class Codes: G11B 33/12 Disposition of constructional parts in the apparatus, e.g. of power supply, of modules

Abstract

A method and apparatus for implementing virtual memory having multiple selected page sizes are provided. A virtual address includes a map index and a frame offset. A selector mechanism receives the virtual address frame offset and generates an offset and index. A frame map table indexes the virtual address map index and the selector generated index and generates a base address. The frame map table generated base address and the selector generated offset are combined to provide a physical address.

Claims

1. An apparatus for implementing virtual memory having multiple selected page sizes comprising:

a virtual address;

the virtual address including a map index and a frame offset;

selector means for receiving the virtual address frame offset and the multiple selected page sizes for generating an offset and index;

said selector means including shifting means for generating a shifted page index; and

an adder;

said adder being operatively controlled by a segment size table entry and arranged to add a result of said shifting means to said result shifted back by one place;

frame map table means for indexing the virtual address map index and the selector means generated index and generating a base address; and

means for adding the frame map table means generated base address and the selector means generated offset and providing a physical address.

2. An apparatus for implementing virtual memory as recited in claim 1 wherein said selector means provides a sequence of page sizes, each sequential page size having a ratio of 1.5 to a previous adjacent page size.

3. An apparatus for implementing virtual memory having multiple selected page sizes comprising:

a virtual address;

the virtual address including a map index and a frame offset;

selector means for receiving the virtual address frame offset and the multiple selected page sizes for generating an offset and index;

said selector means including means for generating a plurality of predetermined boundary values; and

means for generating a limit;

said limit generating means including means for receiving said virtual address frame offset and for subtracting each said predetermined boundary value from said virtual address frame offset;

frame map table means for indexing the virtual address map index and the selector means generated index and generating a base address; and

means for adding the frame map table means generated base address and the selector means generated offset and providing a physical address.