Video display apparatus for displaying a plurality of video signals having different scanning frequencies and a multi-screen display system using the video display apparatus

• US 5,557,342 A
• Filed: 04/19/1995
• Issued: 09/17/1996
• Est. Priority Date: 07/06/1993
• Status: Expired due to Term

• Current Assignee: Hitachi Consumer Electronics Company Limited (Hitachi, Ltd.)
• Original Assignee: Hitachi, Ltd.
• Inventors: Maruyama, Atsushi, Inoue, Fumio, Yamamoto, Kiyoshi, Eto, Masahiro, Ogino, Masanori, Urata, Hiroyuki
• Primary Examiner(s): Kostak, Victor R.
• Application Number:
  US08/425,698
• Time in Patent Office: 517 Days
• Field of Search: 348/204, 348/205, 348/206, 348/553, 348/554, 348/441, 348/556, 348/555, 348/563, 348/564, 348/569, 348/722, 348/839
• US Class Current: 348/706
• CPC Class Codes: H04N 5/45 Picture in picture , e.g. displaying simultaneously another television channel in a region of the screen
• CPC Class Codes: H04N 5/46 for receiving on more than one standard at will deflecting circuits of multi-standard receivers H04N3/27

Abstract

A video display system that includes a housing has arranged thereon a plurality of video input terminals for receiving a plurality of video signals having different scanning frequencies. An expansion/compression processing circuit replaceably mounted on the housing receives and expands/compresses the plurality of video signals and produces at least one video signal expanded/compressed in synchronism with a sync signal selected by a sync switching circuit. At least one of the video signals is synthesized with another video signal, and the synthesized video signal is produced by a video signal synthesis circuit. A video signal from the video signal synthesis circuit is used to generate a video display signal in synchronism with the sync signal. This video display signal is applied to a display. At least one such video display system, an AV controller, a central control console and a lecture table are combined to realize a screen display system.

Claims

1. A video display apparatus for displaying on a display a video signal applied thereto from an input terminal for an external video signal, comprising:

a housing;

a plurality of video input means for receiving a plurality of video signals having different scanning frequencies;

expansion/compression signal input means for receiving an expansion/compression designation signal for expanding/compressing selected one of said video signals;

synthesis signal input control means for producing a synthesis control signal for synthesizing selected one of said video signals in response to a synthesis designation signal;

a plurality of sync signal input means for supplying sync signals containing horizontal and vertical sync signals corresponding to said video signals respectively;

a sync switching circuit for selecting one of said sync signals;

a plurality of expansion/compression processing circuits replaceably mounted on said housing for receiving said video signals having different scanning frequencies, expanding/compressing said received video signals in accordance with said expansion/compression designation signal and producing at least one of the video signals expanded/compressed in synchronism with the sync signal selected by said sync switching circuit;

a video signal synthesis circuit for synthesizing at least one of the video signals produced from the expansion/compression processing circuit with another one of the video signals in accordance with said synthesis control signal and producing selected one of a synthesized video signal and said plurality of video signals containing said another video signal; and

an image processing circuit for generating a video display signal from said video signal of said video signal synthesis circuit in synchronism with the sync signal selected by said sync switching circuit and applying the video display signal to a display.

2. A video display apparatus according to claim 1, wherein each of said expansion/compression processing circuits includes an A-D conversion circuit for converting an analog video signal to said digital video signal, a memory for storing the digital video signal, a D-A conversion circuit for converting the digital video signal stored in the memory to an analog video signal and applying the analog video signal to the video signal synthesis circuit, a write control circuit for controlling the timing of A-D conversion of the A-D conversion circuit and the operation of writing the converted digital video signal into the memory in synchronism with one of the sync signals, a read control circuit for controlling the operation of reading the digital video signal from the memory in synchronism with one of the sync signals selected by said sync switching circuit, and an expansion/compression control circuit for controlling the expansion/compression of the digital video signal in accordance with said expansion/compression designation signal.

3. A screen display system according to claim 1, further comprising a printer interface connected to said video signal synthesis circuit for converting the video signal produced from said video signal synthesis circuit into a print signal.

4. A video display apparatus according to claim 2, wherein each of said D-A conversion circuits of said expansion/compression processing circuits is connected to one of said video signal synthesis circuits, and said video signal synthesis circuit synthesizes each of the analog video signals in analog fashion in accordance with the synthesis control signal and one of sync signals selected by the sync switching circuits, said video signal synthesis circuit producing selected one of a synthesized analog video signal and each of said analog video signals.

5. A video display apparatus according to claim 2, wherein each of the D-A conversion circuits of said expansion/compression processing circuits is connected to each of said video signal synthesis circuits, the input to the video signal synthesis circuit in the first stage of the video signal synthesis circuits is connected to a clamp circuit for reproducing the DC component of one of the analog video signals, the output of the video signal synthesis circuit in said first stage is connected to the input to the video signal synthesis circuit in the next stage and so on in cascade, the video signal synthesis circuit in the last stage of said video signal synthesis circuits synthesizes in analog fashion at least one of the analog video signals produced from said video signal synthesis circuits by said synthesis control signal generated in accordance with the synthesis designation signal and one of the sync signals selected by said sync switching circuit, said video signal synthesis circuit producing selected one of a synthesized analog video signal, an analog video signal from said first-stage video signal synthesis circuit and an analog video signal from said last-stage video signal synthesis circuit.

6. A video display apparatus according to claim 1, wherein at least one of the sync signal input means includes a sync signal generation circuit for supplying one of the sync signals corresponding to said video signals, said sync signal generation circuit being built in said video display apparatus.

7. A video display apparatus according to claim 1, wherein said display includes an analog display and a digital display.

8. A video display apparatus for displaying on a display the video signal from an input terminal for applying an external video signal, comprising:

a housing;

first and second video input means for receiving first and second analog video signals having different scanning frequencies;

expansion/compression signal input means for receiving an expansion/compression designation signal for expanding/compressing selected one of the first and second video signals;

synthesis signal input control means for producing a synthesis control signal for synthesizing said first and second analog video signals in response to a synthesis designation signal,

first and second sync signal input means for selected one of at least receiving and supplying the first and second sync signals including the horizontal and vertical sync signals corresponding to the first and second analog video signals respectively;

a sync switching circuit for selecting and producing one of the first and second sync signals supplied from at least said first and second sync signal input means in accordance with said synthesis designation signal;

a clamp circuit for receiving said first analog video signal and reproducing and outputting the DC component of the first analog video signal;

an expansion/compression processing circuit for converting said second analog video signal to a second digital video signal, expanding/compressing the second digital video signal in accordance with the second sync signal, the first sync signal selected by said sync switching circuit and the expansion/compression designation signal, and producing the third analog video signal expanded/compressed in synchronism with at least the first and second sync signals;

a video signal synthesis circuit for receiving the first analog video signal produced from said clamp circuit and the third analog video signal produced from said expansion/compression processing circuit, synthesizing the first analog video signal and the third analog video signal in analog fashion by said synthesis control signal generated in accordance with the synthesis designation signal and selected one of the first and second sync signals selected by said sync switching circuit thereby to generate a fourth analog video signal, and outputting selected one of the fourth analog video signal and the first and third analog video signals; and

an image processing circuit for generating a video display signal from selected one of the first, third and fourth analog video signals from said video signal synthesis circuit in synchronism with selected one of the first and second sync signals selected by said sync switching circuit and applying said video display signal to a display;

wherein said expansion/compression processing circuit includes an A-D conversion circuit for converting said second analog video signal to said second digital video signal, a memory for storing the second digital video signal, a D-A conversion circuit for converting the second digital video signal stored in the memory to the third analog video signal and applying it to the video signal synthesis circuit, a write control circuit for controlling the timing of A-D conversion of the A-D conversion circuit in synchronism with the second sync signal and the operation of writing the converted second digital video signal into the memory, a read control circuit for controlling the operation of reading the second digital video signal from said memory in synchronism with selected one of the first and second sync signals selected by said sync switching circuit, and an expansion/compression control circuit for controlling the expansion/compression of the second digital video signal in accordance with the expansion/compression designation signal, said expansion/compression processing circuit being replaceably mounted on said housing.

9. A video display apparatus according to claim 8, wherein said expansion/compression processing circuit includes an A-D conversion circuit for converting the second analog video signal to the second digital video signal, a memory for storing the second digital video signal, a D-A conversion circuit for converting the second digital video signal stored in the memory to the third analog video signal and applying the resulting signal to the video signal synthesis circuit, a write control circuit for controlling the timing of A-D conversion of the A-D conversion circuit and the operation of writing the converted second digital video signal into the memory, a read control circuit for controlling the operation of reading the second digital video signal from said memory in synchronism with selected one of the first sync signal and the second sync signal selected by said sync switching circuit, and an expansion/compression control circuit for controlling the write control circuit and the read control circuit in accordance with the expansion/compression designation signal, wherein said sync switching circuit for receiving the first and second sync signals is arranged relocated from said video display unit to the expansion/compression processing circuit, said expansion/compression processing circuit being replaceably arranged on said housing.

10. A video display apparatus according to claim 8, wherein said expansion/compression processing circuit includes an A-D conversion circuit for converting the second analog video signal to the second digital video signal, a memory for storing the second digital video signal, a D-A conversion circuit for converting the second digital video signal stored in the memory to the third analog video signal and applying the resulting signal to said video signal synthesis circuit, a write control circuit for controlling the A-D conversion timing of said A-D conversion circuit and the operation of writing the converted second digital video signal into the memory in synchronism with the second sync signal, a read control circuit for controlling the operation of reading the second digital video signal from said memory in synchronism with selected one of the first sync signal and the second sync signal selected by said sync switching circuit, and an expansion/compression control circuit for controlling the expansion/compression of the second digital video signal in accordance with the expansion/compression designation signal, wherein the expansion/compression processing circuit has mounted thereon a first sync switching circuit for receiving the first and second sync signals, said video display apparatus has arranged on the body thereof a second sync switching circuit for receiving the first sync signal and the second sync signal through said first sync switching circuit, and said expansion/compression processing circuit is replaceably arranged on said housing.

11. A video display apparatus for displaying on the display thereof the video signal received from an input terminal for an external video signal, comprising:

a housing;

first and second video input means for receiving first and second analog video signals having different scanning frequencies;

expansion/compression signal input means for receiving an expansion/compression designation signal for expanding/compressing selected one of the first analog video signal and the second analog video signal;

synthesis signal input control means for producing a synthesis control signal for synthesizing said first and second video signals in response to a synthesis designation signal;

first and second sync signal input means for selected one of at least receiving and supplying the first and second sync signals containing vertical and horizontal sync signals corresponding to the first and second analog video signals respectively;

a sync switching circuit for selecting and outputting selected one of the first sync signal and the second sync signal supplied from at least said first and second sync signal input means respectively in accordance with the synthesis designation signal;

a first A-D conversion circuit for converting the first analog video signal to the first digital video signal;

an expansion/compression processing circuit for converting the second analog video signal to the second digital video signal, expanding/compressing the second digital video signal in accordance with the second sync signal, the first sync signal selected by said sync switching circuit and the expansion/compression designation signal, and producing the third digital video signal expanded/compressed in synchronism with selected one of at least the first and second sync signals;

a video signal synthesis circuit for receiving the first digital video signal produced from said first A-D conversion circuit and the third digital video signal produced from the expansion/compression processing circuit, synthesizing the first digital video signal and the third digital video signal in digital fashion by said synthesis control signal generated in accordance with one of the first and second sync signals selected by the sync switching circuit thereby to generate a fourth digital video signal, and producing selected one of said fourth digital video signal, the first digital video signal and the third digital video signal;

a D-A conversion circuit for converting selected one of the first, third and fourth digital video signals from said video signal synthesis circuit into the fourth analog video signal at a timing synchronous with selected one of the first and second sync signals selected by said sync switching circuit; and

an image processing circuit for generating a video display signal from the fourth analog video signal produced by the D-A conversion circuit in synchronism with one of the first and second sync signals selected by the sync switching circuit, and applying the resulting video display signal to a display;

wherein said expansion/compression processing circuit includes a second A-D conversion circuit for converting the second analog video signal to the second digital video signal, a memory for storing the second digital video signal, a write control circuit for controlling the operation of writing the converted second digital video signal into said memory at an A-D conversion timing of the second A-D conversion circuit in synchronism with the second sync signal, a read control circuit for controlling the operation of reading the third digital video signal from said memory and applying the third digital video signal to said video signal synthesis circuit in synchronism with selected one of the first and second sync signals selected by said sync switching circuit, and an expansion/compression control circuit for controlling the expansion/compression of the third digital video signal in accordance with the expansion/compression designation signal, said expansion/compression processing circuit being arranged replaceably on said housing.

12. A video display apparatus for displaying on a display the video signal received from an input terminal for an external video signal, comprising:

a housing;

first and second video input means for receiving first and second digital video signals having different scanning frequencies;

expansion/compression signal input means for receiving the expansion/compression designation signal for expanding/compressing selected one of the first and second digital video signals;

synthesis signal input means for producing a synthesis control signal for synthesizing said first and second video signals in response to a synthesis designation signal;

first and second sync signal input means for selected one of at least receiving and supplying the first and second sync signals containing the vertical and horizontal sync signals corresponding to the first and second digital video signals;

a sync switching circuit for selecting and outputting selected one of the first and second sync signals supplied from at least the first and second sync signal input means in accordance with the synthesis designation signal;

a first D-A conversion circuit for converting the first digital video signal to the first analog video signal;

an expansion/compression processing circuit for receiving the second digital video signal, expanding/compressing the second digital video signal in accordance with the second sync signal, the first sync signal selected by the sync switching circuit and the expansion/compression designation signal, and producing the second analog video signal expanded/compressed in synchronism with selected one of at least the first and second sync signals;

a video signal synthesis circuit for receiving the first analog video signal produced from said first D-A conversion circuit and the second analog video signal produced from said expansion/compression processing circuit, synthesizing in analog fashion the first analog video signal and the second analog video signal by said synthesis control signal generated in accordance with said synthesis designation signal and one of the first and second sync signals selected by the sync switching circuit thereby to generate a third analog video signal, and producing selected one of the third analog video signal, said first analog video signal and said second analog video signal; and

an image processing circuit for generating a video display signal from selected one of the first, second and third analog video signals produced by said video signal synthesis circuit in synchronism with one of the first and second sync signals selected by said sync switching circuit and applying said video display signal to a display;

wherein said expansion/compression processing circuit includes a memory for storing the second digital video signal, a write control circuit for controlling the operation of writing the second digital video signal into the memory in synchronism with the second sync signal, a read control circuit for controlling the operation of reading the second digital video signal from said memory in synchronism with selected one of the first and second sync signals selected by said sync switching circuit, and an expansion/compression control circuit for controlling the expansion/compression of the second digital video signal in accordance with the expansion/compression designation signal, said expansion/compression processing circuit being arranged replaceably on said housing.

13. A video display apparatus for displaying on a display the video signal received from an input terminal for an external video signal, comprising:

a housing;

first and second video input means for receiving first and second digital video signals having different scanning frequencies;

expansion/compression signal input means for receiving the expansion/compression designation signal for expanding/compressing selected one of the first and second digital video signals;

synthesis signal input control means for producing a synthesis control signal for synthesizing said first and second video signal in response to a synthesis designation signal;

first and second sync signal input means for selected one of at least receiving and supplying the first and second sync signals containing the vertical and horizontal sync signals corresponding to the first and second digital video signals;

a sync switching circuit for selecting and producing selected one of the first and second sync signals supplied from at least said first and second sync signal input means in accordance with the synthesis designation signal;

an expansion/compression processing circuit for expanding/compressing the second digital video signal in accordance with the second sync signal, the first sync signal selected by the sync switching circuit and the expansion/compression designation signal, and producing the third digital video signal expanded/compressed in synchronism with selected one of at least the first and second sync signals;

a video signal synthesis circuit for receiving the first digital video signal and the third digital video signal produced from said expansion/compression processing circuit, synthesizing in digital fashion the first and third digital video signals by said synthesis control signal generated in accordance with the synthesis designation signal and selected one of the first and second sync signals selected by said sync switching circuit thereby to generate a fourth digital video signal, and producing selected one of the fourth digital video signal, the first digital video signal and the third digital video signal;

a D-A conversion circuit for converting selected one of the first, third and fourth digital video signals from the video signal synthesis circuit to the fourth analog video signal at a timing synchronous with one of the first and second sync signals selected by said sync switching circuit; and

an image processing circuit for generating a video display signal from the fourth analog video signal produced by said D-A conversion circuit in synchronism with one of the first and second sync signals selected by said sync switching circuit and applying the resulting video display signal to a display;

wherein said expansion/compression processing circuit includes a memory for storing the second digital video signal, a write control circuit for controlling the operation of writing the second digital video signal into said memory in synchronism with the second sync signal, a read control circuit for controlling the operation of reading the third digital video signal from said memory in synchronism with one of the first and second sync signals selected by said sync switching circuit, and an expansion/compression control circuit for controlling the expansion/compression of the third digital video signal in accordance with the expansion/compression designation signal, said expansion/compression processing circuit being replaceably arranged on said housing.

14. A screen display system comprising:

a plurality of video signal sources;

an AV controller for receiving a plurality of video signals from said video signal sources;

a central control console for selecting the video signals received by said AV controller; and

at least a video display unit connected to said AV controller for displaying a plurality of video signals selected by said central control console;

wherein said video display unit includes;

a housing;

a plurality of video input means for receiving the video signals having different scanning frequencies;

expansion/compression signal input means for receiving an expansion/compression designation signal for expanding/compressing selected one of said video signals;

synthesis signal input control means for producing a synthesis control signal for synthesizing selected one of said video signals in response to a synthesis designation signal;

a plurality of sync signal input means for supplying sync signals containing vertical and horizontal sync signals corresponding to the video signals respectively;

a sync switching circuit for selecting one of the sync signals;

an expansion/compression processing circuit for receiving the video signals having different scanning frequencies, expanding/compressing the video signals in accordance with said expansion/compression designation signal, and producing at least one video signal expanded/compressed in synchronism with the sync signal selected by said sync switching circuit, said expansion/compression processing circuit being replaceably arranged on said housing;

a video signal synthesis circuit for synthesizing at least one of the video signals produced from said expansion/compression processing circuit with another video signal in accordance with said synthesis control signal, and producing selected one of the synthesized video signal and a plurality of video signals containing said another video signal; and

an image processing circuit for generating a video display signal from the video signal produced by said video signal synthesis circuit in synchronism with the sync signal selected by said sync switching circuit and applying the resulting video display signal to a display.

15. A screen display system according to claim 14, wherein said video signal sources include at least an EWS (Engineering Workstation) signal source, a VGA (Video Graphic Array) signal source, an NTSC (National Television System Committee) signal source and an HD (High Definition or Hi-Vision) signal source.

16. A screen display system according to claim 14, wherein said video display unit is connected to a lecture table used by the lecturer, and one of the video signals is supplied to the video display unit together with a sync signal corresponding to the particular video signal from the lecture table by the operation of the lecturer.

17. A screen display system according to claim 15, comprising four video display units connected to the AV controller in accordance with the EWS, VGA, NTSC and HD signal sources respectively.

18. A screen display system according to claim 14, wherein the central control console applies one of the video signals to at least one of said video display units together with the sync signal corresponding to the particular video signal.

19. A screen display system according to claim 18, wherein said video display unit comprises:

said housing;

first and second video input means of said plurality of video input means for receiving the first and second analog video signals having different scanning frequencies;

said expansion/compression signal input means for receiving an expansion/compression designation signal for expanding/compressing selected one of the first and second analog video signals;

said synthesis signal input control means for producing a synthesis control signal for synthesizing said first and second analog signals in response to a synthesis designation signal;

first and second sync signal input means of said plurality of sync signal input means for selected one of at least receiving and supplying the first and second sync signals containing the vertical and horizontal sync signals corresponding to the first and second analog video signals respectively;

said sync switching circuit for selecting and producing selected one of the first and second sync signals supplied from at least said first and second sync signal input means in accordance with the synthesis designation signal;

a clamp circuit for receiving the first analog video signal and reproducing and producing the DC component of said first analog video signal;

said expansion/compression processing circuit for converting said second analog video signal into a second digital video signal, expanding/compressing said second digital video signal in accordance with said expansion/compression designation signal, said first sync signal selected by said sync switching circuit and said second sync signal, and producing the third analog video signal expanded/compressed in synchronism with at least the first and second sync signals;

said video signal synthesis circuit for receiving the first analog video signal from said clamp circuit and the third analog video signal produced from said expansion/compression processing circuit, synthesizing in analog fashion the first analog video signal and the third analog video signal in accordance with the synthesis designation signal and one of the first and second sync signals selected by said sync switching circuit thereby to generate a fourth analog video signal, and producing selected one of the fourth analog video signal, the first analog video signal and the third analog video signal; and

a printer interface for converting the video signal produced from said video signal synthesis circuit into a print signal;

said image processing circuit for generating a video display signal from selected one of the first, third and fourth analog video signals produced by said video signal synthesis circuit in synchronism with one of the first and second sync signals selected by said sync switching circuit, and applying the resulting video display signal to a display;

wherein said expansion/compression processing circuit includes an A-D conversion circuit for converting the second analog video signal to the second digital video signal, a memory for storing the second digital video signal, a D-A conversion circuit for converting the second digital signal stored in the memory to the third analog video signal and applying the resulting signal to the video signal synthesis circuit, a write control circuit for controlling the A-D conversion timing of the A-D conversion circuit and writing the converted second digital video signal into the memory in synchronism with the second sync signal, a read control circuit for controlling the operation of reading the second digital video signal from the memory in synchronism with one of the first and second sync signals selected by the sync switching circuit, and an expansion/compression control circuit for controlling the expansion/compression of the second digital video signal in accordance with the expansion/compression designation signal, said expansion/compression processing circuit being replaceably arranged on said housing.

20. A screen display system according to claim 18, where said video display system includes:

said housing;

first and second video input means of said plurality of video input means for receiving the first and second analog video signals having scanning frequencies;

said expansion/compression signal input means for receiving an expansion/compression designation signal for expanding/compressing selected one of first and second analog video signals;

said synthesis signal input control means for producing a synthesis control signal for synthesizing said first and second video signals in response to a synthesis designation signal;

first and second sync signal input means of said plurality of sync signal input means for selected one of at least receiving and supplying first and second sync signals containing the vertical and horizontal sync signals corresponding to the first and second analog video signals;

said sync switching circuit for selecting and producing selected one the first and second sync signals supplied from at least the first and second sync signal input means in accordance with the synthesis designation signal;

a first A-D conversion circuit for converting the first analog video signal to the first digital video signal;

said expansion/compression processing circuit for converting the second analog video signal to the second digital video signal, expanding/compressing the second digital video signal in accordance with the second sync signal, the first sync signal selected by the sync switching circuit and the expansion/compression designation signal, and producing the third digital video signal expanded/compressed in synchronism with selected one of at least the first and second sync signals;

said video signal synthesis circuit for receiving the first digital video signal produced from the first A-D conversion circuit and the third digital video signal produced from said expansion/compression processing circuit, synthesizing in digital fashion the first digital video signal and the third digital video signal by said synthesis control signal generated in accordance with the synthesis designation signal and one of the first and second sync signals selected by the sync switching circuit thereby to generate a fourth digital video signal, and producing selected one of the fourth digital video signal, the first digital video signal and the third digital video signal;

a printer interface for converting the video signal produced from said video signal synthesis circuit into a print signal;

a D-A conversion circuit for converting selected one of the first, third and fourth digital video signals from the video signal synthesis circuit into a fourth analog video signal at a timing synchronous with one of the first and second sync signals selected by said sync switching circuit; and

said image processing circuit for generating a video display signal from the fourth analog video signal produced by said D-A conversion circuit in synchronism with one of the first and second sync signals selected by said sync switching circuit and applying the resulting video display signal to a display,

wherein said expansion/compression processing circuit includes a second A-D conversion circuit for converting the second analog video signal to the second digital video signal, a memory for storing the second digital video signal, a write control circuit for writing the second digital video signal into the memory at an A-D conversion timing of the second A-D conversion circuit in synchronism with the second sync signal, a read control circuit for controlling the operation of reading the third digital video signal from said memory and applying the third digital video signal to said video signal synthesis circuit in synchronism with one of the first and second sync signals selected by said sync switching circuit, and an expansion/compression control circuit for controlling the expansion/compression of the third digital video signal in accordance with the expansion/compression designation signal, said expansion/compression processing circuit being replaceably arranged on said housing.

21. A screen display system according to claim 18, wherein said video display system includes:

said housing;

first and second video input means of said plurality of video input means for receiving first and second digital video signals having different scanning frequencies;

said expansion/compression signal input means for receiving the expansion/compression designation signal for expanding/compressing selected one of the first and second digital video signals;

said synthesis signal input control means for producing a synthesis control signal for synthesizing said first and second video signals in response to a synthesis designation signal;

first and second sync signal input means of said plurality of sync signal input means for selected one of at least receiving and supplying the first and second sync signals containing the vertical and horizontal sync signals corresponding to the first and second digital video signals respectively;

said sync switching circuit for selecting and producing selected one of the first and second sync signals supplied from at least the first and second sync signal input means in accordance with the synthesis designation signal;

a first D-A conversion circuit for converting the first digital video signal to the first analog video signal;

said expansion/compression processing circuit for receiving the second digital video signal, expanding/compressing the second digital video signal in accordance with the second sync signal, the first sync signal selected by the sync switching circuit and the expansion/compression designation signal, and producing the second analog video signal expanded/compressed in synchronism with selected one of at least the first and second sync signals;

said video signal synthesis circuit for receiving the first analog video signal produced from said first D-A conversion circuit and the second analog video signal produced from the expansion/compression processing circuit, synthesizing the first analog video signal and the second analog video signal in analog fashion by said synthesis control signal generated in accordance with the synthesis designation signal and selected one of the first and second sync signals selected by said sync switching circuit thereby to generate a third analog video signal, and producing selected one of the third analog video signal, the first analog video signal and the second analog video signal; and

a printer interface for converting the video signal produced from said video signal synthesis circuit into a print signal;

said image processing circuit for generating a video display signal from selected one of the first, second and third analog video signals produced by said video signal synthesis circuit in synchronism with one of the first and second sync signals selected by said sync switching circuit and applying the particular video display signal to a display;

wherein said expansion/compression processing circuit includes a memory for storing the second digital video signal, a write control circuit for controlling the operation of writing the second digital video signal into said memory in synchronism with the second sync signal, a read control circuit for controlling the operation of reading the second digital video signal from the memory in synchronism with one of the first and second sync signals selected by said sync switching circuit, and an expansion/compression control circuit for controlling the expansion/compression of the second digital video signal in accordance with the expansion/compression designation signal, said expansion/compression processing circuit being replaceably arranged on said housing.

22. A screen display system according to claim 18, comprising:

said housing;

first and second video input means of said plurality of video input means for receiving first and second digital video signals having different scanning frequencies;

said expansion/compression signal input means for receiving an expansion/compression designation signal for expanding/compressing selected one of the first and second digital video signals;

said synthesis signal input control means for producing a synthesis control signal for synthesizing said first and second video signals in response to a synthesis designation signal;

first and second sync signal input means of said plurality of sync signal input means for selected one of at least receiving and supplying the first and second sync signals containing the vertical and horizontal sync signals corresponding to the first and second digital video signals respectively;

said sync switching circuit for selecting and producing selected one of the first and second sync signals supplied from at least the first and second sync signal input means in accordance with synthesis designation signal;

said expansion/compression processing circuit for expanding/compressing the second digital video signal in accordance with the first sync signal selected by the sync switching circuit and the expansion/compression designation signal and producing the third digital video signal expanded/compressed in synchronism with selected one of at least the first and second sync signals;

said video signal synthesis circuit for receiving the first digital video signal and the third digital video signal produced from said expansion/compression processing circuit, synthesizing the first digital video signal and the third digital video signal in digital fashion by said synthesis control signal generated in accordance with the synthesis designation signal and one of the first and second sync signals selected by said sync switching circuit thereby to generate a fourth digital video signal, and producing selected one of the fourth digital video signal, the first digital video signal and the third digital video signal;

a printer interface for converting the video signal produced from said video signal synthesis circuit into a print signal;

a D-A conversion circuit for converting selected one of the first, third and fourth digital video signals produced by said video signal synthesis circuit to a fourth analog video signal at a timing synchronous with one of the first and second sync signals selected by said sync switching circuit; and

said image processing circuit for generating a video display signal from the fourth analog video signal produced by said D-A conversion circuit in synchronism with one of the first and second sync signals selected by the sync switching circuit and applying the resulting video display signal to a display;

wherein said expansion/compression processing circuit includes a memory for storing the second digital video signal, a write control circuit for controlling the operation of writing the second digital video signal into said memory in synchronism with said second sync signal, a read control circuit for controlling the operation of reading the third digital video signal from said memory in synchronism with one of the first and second sync signals selected by said sync switching circuit, and an expansion/compression control circuit for controlling the expansion/compression of the third digital video signal in accordance with the expansion/compression designation signal, said expansion/compression processing circuit being arranged on said housing.

23. A screen display system comprising:

a plurality of video signal sources;

an AV controller for receiving a plurality of video signals from said video signal sources;

a centralized control console for selecting the video signals received by said AV controller; and

at least a video display unit connected to said AV controller for displaying the video signals selected by said centralized control console;

wherein said video display unit includes;

a housing;

a plurality of video input means for receiving said video signals having different scanning frequencies;

expansion/compression signal input means for receiving an expansion/compression designation signal for expanding/compressing selected one of said video signals;

synthesis signal input control means for producing a synthesis control signal for synthesizing selected one of said video signals in response to a synthesis designation signal;

a plurality of sync signal input means for supplying a sync signal including horizontal and vertical sync signals corresponding to said video signals respectively;

a sync switching circuit for selecting one of said sync signals;

an expansion/compression processing circuit replaceably mounted on said housing for receiving said video signals having different scanning frequencies, expanding/compressing said video signals in accordance with said expansion/compression designation signal, and applying at least a video signal expanded/compressed in synchronism with the sync signal selected by said sync switching circuit to said signal source through said AV controller;

a video signal synthesis circuit for synthesizing at least one of the video signals produced from said expansion/compression processing circuit with another video signal in accordance with said synthesis control signal, and producing selected one of the synthesized video signal and said video signals including said another video signal;

a printer interface for converting the video signal produced from said video signal synthesis circuit into a print signal; and

a video processing circuit for producing a video display signal from said video signal produced by said video signal synthesis circuit in synchronism with said sync signal selected by said sync switching circuit, and applying said video signal to a display unit.

24. A video display apparatus for displaying on a display a video signal applied thereto from an input terminal for an external video signal, comprising:

a housing;

a plurality of video input means for receiving a plurality of video signals having different scanning frequencies;

expansion/compression signal input means for receiving an expansion/compression designation signal for expanding/compressing selected one of said video signals;

synthesis signal input control means for producing a synthesis control signal for synthesizing selected one of said video signals in response to a synthesis designation signal;

a plurality of sync signal input means for supplying sync signals containing horizontal and vertical sync signals corresponding to said video signals respectively;

a sync switching circuit for selecting one of said sync signals;

a plurality of expansion/compression processing circuits mounted on said housing for receiving said video signals having different scanning frequencies, expanding/compressing said received video signals in accordance with said expansion/compression designation signal and producing at least one of the video signals expanded/compressed in synchronism with the sync signal selected by said sync switching circuit;

a video signal synthesis circuit for synthesizing at least one of the video signals produced from the expansion/compression processing circuit with another one of the video signals in accordance with said synthesis control signal and producing selected one of a synthesized video signal and said plurality of video signals containing said another video signal; and

an image processing circuit for generating a video display signal from said video signal of said video signal synthesis circuit in synchronism with the sync signal selected by said sync switching circuit and applying the video display signal to a display.

25. A video display apparatus according to claim 24, wherein each of said expansion/compression processing circuits includes an A-D conversion circuit for converting an analog video signal to said digital video signal, a memory for storing the digital video signal, a D-A conversion circuit for converting the digital video signal stored in the memory to an analog video signal and applying the analog video signal to the video signal synthesis circuit, a write control circuit for controlling the timing of A-D conversion of the A-D conversion circuit and the operation of writing the converted digital video signal into the memory in synchronism with one of the sync signals, a read control circuit for controlling the operation of reading the digital video signal from the memory in synchronism with one of the sync signals selected by said sync switching circuit, and an expansion/compression control circuit for controlling the expansion/compression of the digital video signal in accordance with said expansion/compression designation signal.

26. A screen display system according to claim 24, further comprising a printer interface connected to said video signal synthesis circuit for converting the video signal produced from said video signal synthesis circuit into a print signal.

27. A video display apparatus according to claim 25, wherein each of said D-A conversion circuits of said expansion/compression processing circuits is connected to one of said video signal synthesis circuits, and said video signal synthesis circuit synthesizes each of the analog video signals in analog fashion in accordance with the synthesis control signal and one of sync signals selected by the sync switching circuits, said video signal synthesis circuit producing selected one of a synthesized analog video signal and each of said analog video signals.

28. A video display apparatus according to claim 25, wherein each of the D-A conversion circuits of said expansion/compression processing circuits is connected to each of said video signal synthesis circuits, the input to the video signal synthesis circuit in the first stage of the video signal synthesis circuits is connected to a clamp circuit for reproducing the DC component of one of the analog video signals, the output of the video signal synthesis circuit in said first stage is connected to the input to the video signal synthesis circuit in the next stage and so on in cascade, the video signal synthesis circuit in the last stage of said video signal synthesis circuits synthesizes in analog fashion at least one of the analog video signals produced from said video signal synthesis circuits by said synthesis control signal generated in accordance with the synthesis designation signal and one of the sync signals selected by said sync switching circuit, said video signal synthesis circuit producing selected one of a synthesized analog video signal, an analog video signal from said first-stage video signal synthesis circuit and an analog video signal from said last-stage video signal synthesis circuit.

29. A video display apparatus according to claim 24, wherein at least one of the sync signal input means includes a sync signal generation circuit for supplying one of the sync signals corresponding to said video signals, said sync signal generation circuit being built in said video display apparatus.

30. A video display apparatus according to claim 24, wherein said display includes an analog display and a digital display.

31. A video display apparatus for displaying on a display the video signal from an input terminal for applying an external video signal, comprising:

a housing;

first and second video input means for receiving first and second analog video signals having different scanning frequencies;

expansion/compression signal input means for receiving an expansion/compression designation signal for expanding/compressing selected one of the first and second video signals;

synthesis signal input control means for producing a synthesis control signal for synthesizing said first and second analog video signals in response to a synthesis designation signal;

first and second sync signal input means for selected one of at least receiving and supplying the first and second sync signals including the horizontal and vertical sync signals corresponding to the first and second analog video signals respectively;

a sync switching circuit for selecting and producing one of the first and second sync signals supplied from at least said first and second sync signal input means in accordance with said synthesis designation signal;

a clamp circuit for receiving said first analog video signal and reproducing and outputting the DC component of the first analog video signal;

an expansion/compression processing circuit for converting said second analog video signal to a second digital video signal, expanding/compressing the second digital video signal in accordance with the second sync signal, the first sync signal selected by said sync switching circuit and the expansion/compression designation signal, and producing the third analog video signal expanded/compressed in synchronism with at least the first and second sync signals;

a video signal synthesis circuit for receiving the first analog video signal produced from said clamp circuit and the third analog video signal produced from said expansion/compression processing circuit, synthesizing the first analog video signal and the third analog video signal in analog fashion by said synthesis control signal generated in accordance with the synthesis designation signal and selected one of the first and second sync signals selected by said sync switching circuit thereby to generate a fourth analog video signal, and outputting selected one of the fourth analog video signal and the first and third analog video signals; and

an image processing circuit for generating a video display signal from selected one of the first, third and fourth analog video signals from said video signal synthesis circuit in synchronism with selected one of the first and second sync signals selected by said sync switching circuit and applying said video display signal to a display;

wherein said expansion/compression processing circuit includes an A-D conversion circuit for converting said second analog video signal to said second digital video signal, a memory for storing the second digital video signal, a D-A conversion circuit for converting the second digital video signal stored in the memory to the third analog video signal and applying it to the video signal synthesis circuit, a write control circuit for controlling the timing of A-D conversion of the A-D conversion circuit in synchronism with the second sync signal and the operation of writing the converted second digital video signal into the memory, a read control circuit for controlling the operation of reading the second digital video signal from said memory in synchronism with selected one of the first and second sync signals selected by said sync switching circuit, and an expansion/compression control circuit for controlling the expansion/compression of the second digital video signal in accordance with the expansion/compression designation signal, said expansion/compression processing circuit being mounted on said housing.

32. A video display apparatus according to claim 31, wherein said expansion/compression processing circuit includes an A-D conversion circuit for converting the second analog video signal to the second digital video signal, a memory for storing the second digital video signal, a D-A conversion circuit for converting the second digital video signal stored in the memory to the third analog video signal and applying the resulting signal to the video signal synthesis circuit, a write control circuit for controlling the timing of A-D conversion of the A-D conversion circuit and the operation of writing the converted second digital video signal into the memory, a read control circuit for controlling the operation of reading the second digital video signal from said memory in synchronism with selected one of the first sync signal and the second sync signal selected by said sync switching circuit, and an expansion/compression control circuit for controlling the write control circuit and the read control circuit in accordance with the expansion/compression designation signal, wherein said sync switching circuit for receiving the first and second sync signals is arranged relocated from said video display unit to the expansion/compression processing circuit, said expansion/compression processing circuit being replaceably arranged on said housing.

33. A video display apparatus according to claim 31, wherein said expansion/compression processing circuit includes an A-D conversion circuit for converting the second analog video signal to the second digital vide signal, a memory for storing the second digital video signal, a D-A conversion circuit for converting the second digital video signal stored in the memory to the third analog video signal and applying the resulting signal to said video signal synthesis circuit, a write control circuit for controlling the A-D conversion timing of said A-D conversion circuit and the operation of writing the converted second digital video signal into the memory in synchronism with the second sync signal, a read control circuit for controlling the operation of reading the second digital video signal from said memory in synchronism with selected one of the first sync signal and the second sync signal selected by said sync switching circuit, and an expansion/compression control circuit for controlling the expansion/compression of the second digital video signal in accordance with the expansion/compression designation signal, wherein the expansion/compression processing circuit has mounted thereon a first sync switching circuit for receiving the first and second sync signals, said video display apparatus has arranged on the body thereof a second sync switching circuit for receiving the first sync signal and the second sync signal through said first sync switching circuit, and said expansion/compression processing circuit is replaceably arranged on said housing.

34. A video display apparatus for displaying on the display thereof the video signal received from an input terminal for an external video signal, comprising:

a housing;

first and second video input means for receiving first and second analog video signals having different scanning frequencies;

expansion/compression signal input means for receiving an expansion/compression designation signal for expanding/compressing selected one of the first analog video signal and the second analog video signal;

synthesis signal input control means for producing a synthesis control signal for synthesizing said first and second video signals in response to a synthesis designation signal;

first and second sync signal input means for selected one of at least receiving and supplying the first and second sync signals containing vertical and horizontal sync signals corresponding to the first and second analog video signals respectively;

a sync switching circuit for selecting and outputting selected one of the first sync signal and the second sync signal supplied from at least said first and second sync signal input means respectively in accordance with the synthesis designation signal;

a first A-D conversion circuit for converting the first analog video signal to the first digital video signal;

an expansion/compression processing circuit for converting the second analog video signal to the second digital video signal, expanding/compressing the second digital video signal in accordance with the second sync signal, the first sync signal selected by said sync switching circuit and the expansion/compression designation signal, and producing the third digital video signal expanded/compressed in synchronism with selected one of at least the first and second sync signals;

a video signal synthesis circuit for receiving the first digital video signal produced from said first A-D conversion circuit and the third digital video signal produced from the expansion/compression processing circuit, synthesizing the first digital video signal and the third digital video signal in digital fashion by said synthesis control signal generated in accordance with one of the first and second sync signals selected by the sync switching circuit thereby to generate a fourth digital video signal, and producing selected one of said fourth digital video signal, the first digital video signal and the third digital video signal;

a D-A conversion circuit for converting selected one of the first, third and fourth digital video signals from said video signal synthesis circuit into the fourth analog video signal at a timing synchronous with selected one of the first and second sync signals selected by said sync switching circuit; and

an image processing circuit for generating a video display signal from the fourth analog video signal produced by the D-A conversion circuit in synchronism with one of the first and second sync signals selected by the sync switching circuit, and applying the resulting video display signal to a display;

wherein said expansion/compression processing circuit includes a second A-D conversion circuit for converting the second analog video signal to the second digital video signal, a memory for storing the second digital video signal, a write control circuit for controlling the operation of writing the converted second digital video signal into said memory at an A-D conversion timing of the second A-D conversion circuit in synchronism with the second sync signal, a read control circuit for controlling the operation of reading the third digital video signal from said memory and applying the third digital video signal to said video signal synthesis circuit in synchronism with selected one of the first and second sync signals selected by said sync switching circuit, and an expansion/compression control circuit for controlling the expansion/compression of the third digital video signal in accordance with the expansion/compression designation signal, said expansion/compression processing circuit being arranged on said housing.

35. A video display apparatus for displaying on a display the video signal received from an input terminal for an external video signal, comprising:

a housing;

first and second video input means for receiving first and second digital video signals having different scanning frequencies;

expansion/compression signal input means for receiving the expansion/compression designation signal for expanding/compressing selected one of the first and second digital video signals;

synthesis signal input means for producing a synthesis control signal for synthesizing said first and second video signals in response to a synthesis designation signal;

first and second sync signal input means for selected one of at least receiving and supplying the first and second sync signals containing the vertical and horizontal sync signals corresponding to the first and second digital video signals;

a sync switching circuit for selecting and outputting selected one of the first and second sync signals supplied from at least the first and second sync signal input means in accordance with the synthesis designation signal;

a first D-A conversion circuit for converting the first digital video signal to the first analog video signal;

an expansion/compression processing circuit for receiving the second digital video signal, expanding/compressing the second digital video signal in accordance with the second sync signal, the first sync signal selected by the sync switching circuit and the expansion/compression designation signal, and producing the second analog video signal expanded/compressed in synchronism with selected one of at least the first and second sync signals;

a video signal synthesis circuit for receiving the first analog video signal produced from said first D-A conversion circuit and the second analog video signal produced from said expansion/compression processing circuit, synthesizing in analog fashion the first analog video signal and the second analog video signal by said synthesis control signal generated in accordance with said synthesis designation signal and one of the first and second sync signals selected by the sync switching circuit thereby to generate a third analog video signal, and producing selected one of the third analog video signal, said first analog video signal and said second analog video signal; and

an image processing circuit for generating a video display signal from selected one of the first, second and third analog video signals produced by said video signal synthesis circuit in synchronism with one of the first and second sync signals selected by said sync switching circuit and applying said video display signal to a display;

wherein said expansion/compression processing circuit includes a memory for storing the second digital video signal, a write control circuit for controlling the operation of writing the second digital video signal into the memory in synchronism with the second sync signal, a read control circuit for controlling the operation of reading the second digital video signal from said memory in synchronism with selected one of the first and second sync signals selected by said sync switching circuit, and an expansion/compression control circuit for controlling the expansion/compression of the second digital video signal in accordance with the expansion/compression designation signal, said expansion/compression processing circuit being arranged on said housing.

36. A video display apparatus for displaying on a display the video signal received from an input terminal for an external video signal, comprising:

a housing;

first and second video input means for receiving first and second digital video signals having different scanning frequencies;

expansion/compression signal input means for receiving the expansion/compression designation signal for expanding/compressing selected one of the first and second digital video signals;

synthesis signal input control means for producing a synthesis control signal for synthesizing said first and second video signal in response to a synthesis designation signal;

first and second sync signal input means for selected one of at least receiving and supplying the first and second sync signals containing the vertical and horizontal sync signals corresponding to the first and second digital video signals;

a sync switching circuit for selecting and producing selected one of the first and second sync signals supplied from at least said first and second sync signal input means in accordance with the synthesis designation signal;

an expansion/compression processing circuit for expanding/compressing the second digital video signal in accordance with the second sync signal, the first sync signal selected by the sync switching circuit and the expansion/compression designation signal, and producing the third digital video signal expanded/compressed in synchronism with selected one of at least the first and second sync signals;

a video signal synthesis circuit for receiving the first digital video signal and the third digital video signal produced from said expansion/compression processing circuit, synthesizing in digital fashion the first and third digital video signals by said synthesis control signal generated in accordance with the synthesis designation signal and selected one of the first and second sync signals selected by said sync switching circuit thereby to generate a fourth digital video signal, and producing selected one of the fourth digital video signal, the first digital video signal and the third digital video signal;

a D-A conversion circuit for converting selected one of the first, third and fourth digital video signals from the video signal synthesis circuit to the fourth analog video signal at a timing synchronous with one of the first and second sync signals selected by said sync switching circuit; and

an image processing circuit for generating a video display signal from the fourth analog video signal produced by said D-A conversion circuit in synchronism with one of the first and second sync signals selected by said sync switching circuit and applying the resulting video display signal to a display;

wherein said expansion/compression processing circuit includes a memory for storing the second digital video signal, a write control circuit for controlling the operation of writing the second digital video signal into said memory in synchronism with the second sync signal, a read control circuit for controlling the operation of reading the third digital video signal from said memory in synchronism with one of the first and second sync signals selected by said sync switching circuit, and an expansion/compression control circuit for controlling the expansion/compression of the third digital video signal in accordance with the expansion/compression designation signal, said expansion/compression processing circuit being arranged on said housing.

37. A screen display system comprising:

a plurality of video signal sources;

an AV controller for receiving at least one of a plurality of video signals from said video signal sources;

a central control console for selecting the video signal received by said AV controller; and

at least a video display unit connected to said AV controller for displaying a plurality of video signals selected by said central control console;

wherein said video display unit includes;

a housing;

a plurality of video input means for receiving the video signals having different scanning frequencies;

expansion/compression signal input means for receiving an expansion/compression designation signal for expanding/compressing selected one of said video signals;

synthesis signal input control means for producing a synthesis control signal for synthesizing selected one of said video signals in response to a synthesis designation signal;

a plurality of sync signal input means for supplying sync signals containing vertical and horizontal sync signals corresponding to the video signals respectively;

a sync switching circuit for selecting one of the sync signals;

an expansion/compression processing circuit for receiving the video signals having different scanning frequencies, expanding/compressing the video signals in accordance with said expansion/compression designation signal, and producing at least one video signal expanded/compressed in synchronism with the sync signal selected by said sync switching circuit, said expansion/compression processing circuit being arranged on said housing;

a video signal synthesis circuit for synthesizing at least one of the video signals produced from said expansion/compression processing circuit with another video signal in accordance with said synthesis control signal, and producing selected one of the synthesized video signal and a plurality of video signals containing said another video signal; and

an image processing circuit for generating a video display signal from the video signal produced by said video signal synthesis circuit in synchronism with the sync signal selected by said sync switching circuit and applying the resulting video display signal to a display.

38. A screen display system according to claim 37, wherein said video signal sources include at least an EWS (Engineering Workstation) signal source, a VGA (Video Graphic Array) signal source, an NTSC (National Television System Committee) signal source and an HD (High Definition or Hi-Vision) signal source.

39. A screen display system according to claim 37, wherein said video display unit is connected to a lecture table used by the lecturer, and one of the video signals is supplied to the video display unit together with a sync signal corresponding to the particular video signal from the lecture table by the operation of the lecturer.

40. A screen display system according to claim 38, comprising four video display units connected to the AV controller in accordance with the EWS, VGA, NTSC and HD signal sources respectively.

41. A screen display system according to claim 37, wherein the central control console applies one of the video signals to at least one of said video display units together with the sync signal corresponding to particular video signal.

42. A screen display system according to claim 41, wherein said video display unit comprises:

said housing;

first and second video input means of said plurality of video input means for receiving the first and second analog video signals having different scanning frequencies;

said expansion/compression signal input means for receiving an expansion/compression designation signal for expanding/compressing selected one of the first and second analog video signals;

said synthesis signal input control means for producing a synthesis control signal for synthesizing said first and second analog signals in response to a synthesis designation signal;

first and second sync signal input means of said plurality of sync signal input means for selected one of at least receiving and supplying the first and second sync signals containing the vertical and horizontal sync signals corresponding to the first and second analog video signals respectively;

said sync switching circuit for selecting and producing selected one of the first and second sync signals supplied from at least said first and second sync signal input means in accordance with the synthesis designation signal;

a clamp circuit for receiving the first analog video signal and reproducing and producing the DC component of said first analog video signal;

said expansion/compression processing circuit for converting said second analog video signal into a second digital video signal, expanding/compressing said second digital video signal in accordance with said expansion/compression designation signal, said first sync signal selected by said sync switching circuit and said second sync signal, and producing the third analog video signal expanded/compressed in synchronism with at least the first and second sync signals;

said video signal synthesis circuit for receiving the first analog video signal from said clamp circuit and the third analog video signal produced from said expansion/compression processing circuit, synthesizing in analog fashion the first analog video signal and the third analog video signal in accordance with the synthesis designation signal and one of the first and second sync signals selected by said sync switching circuit thereby to generate a fourth analog video signal, and producing selected one of the fourth analog video signal, the first analog video signal and the third analog video signal; and

a printer interface for converting the video signal produced from said video signal synthesis circuit into a print signal;

said image processing circuit for generating a video display signal from selected one of the first, third and fourth analog video signals produced by said video signal synthesis circuit in synchronism with one of the first and second sync signals selected by said sync switching circuit, and applying the resulting video display signal to a display;

wherein said expansion/compression processing circuit includes an A-D conversion circuit for converting the second analog video signal to the second digital video signal, a memory for storing the second digital video signal, a D-A conversion circuit for converting the second digital signal stored in the memory to the third analog video signal and applying the resulting signal to the video signal synthesis circuit, a write control circuit for controlling the A-D conversion timing of the A-D conversion circuit and writing the converted second digital video signal into the memory in synchronism with the second sync signal, a read control circuit for controlling the operation of reading the second digital video signal from the memory in synchronism with one of the first and second sync signals selected by the sync switching circuit, and an expansion/compression control circuit for controlling the expansion/compression of the second digital video signal in accordance with the expansion/compression designation signal, said expansion/compression processing circuit being replaceably arranged on said housing.

43. A screen display system according to claim 41, where said video display system includes:

said housing;

first and second video input means of said plurality of video input means for receiving the first and second analog video signals having scanning frequencies;

said expansion/compression signal input means for receiving an expansion/compression designation signal for expanding/compressing selected one of first and second analog video signals;

said synthesis signal input control means for producing a synthesis control signal for synthesizing said first and second video signals in response to a synthesis designation signal;

first and second sync signal input means of said plurality of sync signal input means for selected one of at least receiving and supplying first and second sync signals containing the vertical and horizontal sync signals corresponding to the first and second analog video signals;

said sync switching circuit for selecting and producing selected one the first and second sync signals supplied from at least the first and second sync signal input means in accordance with the synthesis designation signal;

a first A-D conversion circuit for converting the first analog video signal to the first digital video signal;

said expansion/compression processing circuit for converting the second analog video signal to the second digital video signal, expanding/compressing the second digital video signal in accordance with the second sync signal, the first sync signal selected by the sync switching circuit and the expansion/compression designation signal, and producing the third digital video signal expanded/compressed in synchronism with selected one of at least the first and second sync signals;

said video signal synthesis circuit for receiving the first digital video signal produced from the first A-D conversion circuit and the third digital video signal produced from said expansion/compression processing circuit, synthesizing in digital fashion the first digital video signal and the third digital video signal by said synthesis control signal generated in accordance with the synthesis designation signal and one of the first and second sync signals selected by the sync switching circuit thereby to generate a fourth digital video signal, and producing selected one of the fourth digital video signal, the first digital video signal and the third digital video signal;

a printer interface for converting the video signal produced from said video signal synthesis circuit into a print signal;

a D-A conversion circuit for converting selected one of the first, third and fourth digital video signals from the video signal synthesis circuit into a fourth analog video signal at a timing synchronous with one of the first and second sync signals selected by said sync switching circuit; and

said image processing circuit for generating a video display signal from the fourth analog video signal produced by said D-A conversion circuit in synchronism with one of the first and second sync signals selected by said sync switching circuit and applying the resulting video display signal to a display;

wherein said expansion/compression processing circuit includes a second A-D conversion circuit for converting the second analog video signal to the second digital video signal, a memory for storing the second digital video signal, a write control circuit for writing the second digital video signal into the memory at an A-D conversion timing of the second A-D conversion circuit in synchronism with the second sync signal, a read control circuit for controlling the operation of reading the third digital video signal from said memory and applying the third digital video signal to said video signal synthesis circuit in synchronism with one of the first and second sync signals selected by said sync switching circuit, and an expansion/compression control circuit for controlling the expansion/compression of the third digital video signal in accordance with the expansion/compression designation signal, said expansion/compression processing circuit being arranged on said housing.

44. A screen display system according to claim 41, wherein said video display system includes:

said housing;

first and second video input means of said plurality of video input means for receiving first and second digital video signals having different scanning frequencies;

said expansion/compression signal input means for receiving the expansion/compression designation signal for expanding/compressing selected one of the first and second digital video signals;

said synthesis signal input control means for producing a synthesis control signal for synthesizing said first and second video signals in response to a synthesis designation signal;

first and second sync signal input means of said plurality of sync signal input means for selected one of at least receiving and supplying the first and second sync signals containing the vertical and horizontal sync signals corresponding to the first and second digital video signals respectively;

said sync switching circuit for selecting and producing selected one of the first and second sync signals supplied from at least the first and second sync signal input means in accordance with the synthesis designation signal;

a first D-A conversion circuit for converting the first digital video signal to the first analog video signal;

said expansion/compression processing circuit for receiving the second digital video signal, expanding/compressing the second digital video signal in accordance with the second sync signal, the first sync signal selected by the sync switching circuit and the expansion/compression designation signal, and producing the second analog video signal expanded/compressed in synchronism with selected one of at least the first and second sync signals;

said video signal synthesis circuit for receiving the first analog video signal produced from said first D-A conversion circuit and the second analog video signal produced from the expansion/compression processing circuit, synthesizing the first analog video signal and the second analog video signal in analog fashion by said synthesis control signal generated in accordance with the synthesis designation signal and selected one of the first and second sync signals selected by said sync switching circuit thereby to generate a third analog video signal, and producing selected one of the third analog video signal, the first analog video signal and the second analog video signal; and

a printer interface for converting the video signal produced from said video signal synthesis circuit into a print signal;

said image processing circuit for generating a video display signal from selected one of the first, second and third analog video signals produced by said video signal synthesis circuit in synchronism with one of the first and second sync signals selected by said sync switching circuit and applying the particular video display signal to a display;

wherein said expansion/compression processing circuit includes a memory for storing the second digital video signal, a write control circuit for controlling the operation of writing the second digital video signal into said memory in synchronism with the second sync signal, a read control circuit for controlling the operation of reading the second digital video signal from the memory in synchronism with one of the first and second sync signals selected by said sync switching circuit, and an expansion/compression control circuit for controlling the expansion/compression of the second digital video signal in accordance with the expansion/compression designation signal, said expansion/compression processing circuit being replaceably arranged on said housing.

45. A screen display system according to claim 41, comprising:

said housing;

first and second video input means of said plurality of video input means for receiving first and second digital video signals having different scanning frequencies;

said expansion/compression signal input means for receiving an expansion/compression designation signal for expanding/compressing selected one of the first and second digital video signals;

said synthesis signal input control means for producing a synthesis control signal for synthesizing said first and second video signals in response to a synthesis designation signal;

first and second sync signal input means of said plurality of sync signal input means for selected one of at least receiving and supplying the first and second sync signals containing the vertical and horizontal sync signals corresponding to the first and second digital video signals respectively;

said sync switching circuit for selecting and producing selected one of the first and second sync signals supplied from at least the first and second sync signal input means in accordance with synthesis designation signal;

said expansion/compression processing circuit for expanding/compressing the second digital video signal in accordance with the first sync signal selected by the sync switching circuit and the expansion/compression designation signal and producing the third digital video signal expanded/compressed in synchronism with selected one of at least the first and second sync signals;

said video signal synthesis circuit for receiving the first digital video signal and the third digital video signal produced from said expansion/compression processing circuit, synthesizing the first digital video signal and the third digital video signal in digital fashion by said synthesis control signal generated in accordance with the synthesis designation signal and one of the first and second sync signals selected by said sync switching circuit thereby to generate a fourth digital video signal, and producing selected one of the fourth digital video signal, the first digital video signal and the third digital video signal;

a printer interface for converting the video signal produced from said video signal synthesis circuit into a print signal;

a D-A conversion circuit for converting selected one of the first, third and fourth digital video signals produced by said video signal synthesis circuit to a fourth analog video signal at a timing synchronous with one of the first and second sync signals selected by said sync switching circuit; and

said image processing circuit for generating a video display signal from the fourth analog video signal produced by said D-A conversion circuit in synchronism with one of the first and second sync signals selected by the sync switching circuit and applying the resulting video display signal to a display;

wherein said expansion/compression processing circuit includes a memory for storing the second digital video signal, a write control circuit for controlling the operation of writing the second digital video signal into said memory in synchronism with said second sync signal, a read control circuit for controlling the operation of reading the third digital video signal from said memory in synchronism with one of the first and second sync signals selected by said sync switching circuit, and an expansion/compression control circuit for controlling the expansion/compression of the third digital video signal in accordance with the expansion/compression designation signal, said expansion/compression processing circuit being arranged on said housing.

46. A screen display system comprising:

a plurality of video signal sources;

an AV controller for receiving at least one of video signals from said video signal sources;

a centralized control console for selecting the video signal received by said AV controller; and

at least a video display unit connected to said AV controller for displaying the video signals selected by said centralized control console;

wherein said video display unit includes;

a housing;

a plurality of video input means for receiving said video signals having different scanning frequencies;

expansion/compression signal input means for receiving an expansion/compression designation signal for expanding/compressing selected one of said video signals;

synthesis signal input control means for producing a synthesis control signal for synthesizing selected one of said video signals in response to a synthesis designation signal;

a plurality of sync signal input means for supplying a sync signal including horizontal and vertical sync signals corresponding to said video signals respectively;

a sync switching circuit for selecting one of said sync signals;

an expansion/compression processing circuit mounted on said housing for receiving said video signals having different scanning frequencies, expanding/compressing said video signals in accordance with said expansion/compression designation signal, and applying at least a video signal expanded/compressed in synchronism with the sync signal selected by said sync switching circuit to said signal source through said AV controller;

a video signal synthesis circuit for synthesizing at least one of the video signals produced from said expansion/compression processing circuit with another video signal in accordance with said synthesis control signal, and producing selected one of the synthesized video signal and said video signals including said another video signal;

a printer interface for converting the video signal produced from said video signal synthesis circuit into a print signal; and

a video processing circuit for producing a video display signal from said video signal produced by said video signal synthesis circuit in synchronism with said sync signal selected by said sync switching circuit, and applying said video signal to a display unit.

47. A video display apparatus for displaying on a display a video signal applied thereto from an input terminal for an external video signal, comprising:

a housing;

at least a video input means for receiving at least a video signal having a predetermined scanning frequency;

signal source means for outputting at least one video signal and a corresponding sync signal containing horizontal and vertical sync signals;

synthesis signal input control means for producing a synthesis control signal for synthesizing said video signal from said video input means and said video signal from said signal source means in response to a synthesis designation signal;

at least a sync signal input means for supplying sync signal containing horizontal and vertical sync signals corresponding to said video signal, respectively;

a sync switching circuit for selecting at least one of said sync signal from said sync signal input means and said sync signal from said signal source means;

a video signal synthesis circuit for synthesizing at least said video signal produced from the signal source means with said video signal received from said video input means in accordance with said synthesis control signal and producing selected at least one synthesized video signal and said video signal from said video input means; and

an image processing circuit for generating a video display signal from said video signal of said video signal synthesis circuit in synchronism with the sync signal selected by said sync switching circuit and applying the video display signal to the display.

48. A video display apparatus according to claim 47 further comprising:

at least an expansion/compression signal input means for receiving an expansion/compression designation signal for expanding/compressing said video signal from said video signal input means; and

at least an expansion/compression processing circuit for expanding/compressing said received video signal in accordance with said expansion/compression designation signal and producing at least a video signal expanded/compressed in synchronism with the sync signal selected by said switching circuit.

49. A video display apparatus according to claim 47, wherein said signal source means further includes at least an expansion/compression processing circuit for expanding/compressing at least a video signal generated from said signal source means itself and producing at least a video signal expanded/compressed in synchronism with the sync signal generated from said signal source means itself.

50. A video display apparatus for displaying on a display a video signal applied thereto from an input terminal for an external video signal, comprising:

a housing;

a plurality of video input means for receiving a plurality of video signals having different scanning frequencies;

expansion/compression signal input means for receiving an expansion/compression designation signal for expanding/compressing selected one of said video signals;

synthesis signal input control means for producing a synthesis control signal for synthesizing selected one of said video signals in response to a synthesis designation signal;

a plurality of sync signal input means for supplying externally inputted sync signals containing horizontal and vertical sync signals corresponding to said video signals respectively;

sync signal generation means incorporated in said housing, for generating at least one internally generated sync signal containing horizontal and vertical sync signals to drive said display, regardless of said video signals including the corresponding externally inputted sync signals;

a sync switching circuit for selecting one of said externally inputted sync signals and said internally generated sync signal;

a plurality of expansion/compression processing circuits mounted on said housing for receiving said video signals having different scanning frequencies, expanding/compressing said received video signals in accordance with said expansion/compression designation signal and producing at least one of the video signals expanded/compressed in synchronism with the sync signal selected by said sync switching circuit;

a video signal synthesis circuit for synthesizing at least one of the video signals produced from the expansion/compression processing circuit with another one of the video signals in accordance with said synthesis control signal and producing selected one of a synthesized video signal and said plurality of video signals containing said another video signal; and

an image processing circuit for generating a video display signal from said video signal of said video signal synthesis circuit in synchronism with the sync signal selected by said sync switching circuit and applying the video display signal to said display.