Dynamic threshold voltage mosfet having gate to body connection for ultra-low voltage operation

• US 5,559,368 A
• Filed: 08/30/1994
• Issued: 09/24/1996
• Est. Priority Date: 08/30/1994
• Status: Expired due to Fees

• Current Assignee: Regents of the University of California (University of California)
• Original Assignee: Regents of the University of California (University of California)
• Inventors: Assaderaghi, Fariborz, Hu, Chenming, Parke, Stephen, Ko, Ping K.
• Primary Examiner(s): TRAN, MINH LOAN
• Application Number:
  US08/297,995
• Time in Patent Office: 756 Days
• Field of Search: 257/347, 257/348, 257/349, 257/350, 257/351, 257/369, 257/384, 257/388, 257/402, 257/407, 257/412, 257/368, 327/328, 327/434
• US Class Current: 257/369
• CPC Class Codes: H01L 27/092 complementary MIS field-effect transistors
• CPC Class Codes: H01L 29/783 comprising a gate to body connection, i.e. bulk dynamic threshold voltage MOSFET for thin film transistors H01L29/78612, H01L29/78696
• CPC Class Codes: H01L 29/7838 without inversion channel, e.g. buried channel lateral MISFETs, normally-on lateral MISFETs, depletion-mode lateral MISFETs
• CPC Class Codes: H01L 29/78606 with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device H01L29/78642, H01L29/78645 take precedence
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A dynamic threshold voltage IGFET such as a MOSFET is operable at voltages of 0.6 volt or less. The threshold voltage of the transistor is reduced to zero volt or less by interconnecting the gate contact and the device body in which the voltage controlled channel is located. Several efficient connections using through hole plating or polycrystalline silicon gate extension are disclosed. A higher power supply voltage can be used by interconnecting the gate and device body through a smaller MOSFET.

Claims

1. A dynamic threshold insulated gate field effect device comprising

a first transistor formed in a first semiconductor body region and having a source, a drain, a channel region between said source and said drain, and a gate contact overlying said channel region,

a second transistor formed in a second semiconductor body region and having a source, a drain, a channel region between said source and said drain, and a gate contact overlying said channel region,

means for interconnecting said drain of said second transistor to said gate of said first transistor,

means for interconnecting said source of said second transistor to said first semiconductor body region,

means for interconnecting said source of said first transistor to a reference potential, and

means for biasing said gate contact of said second transistor with an appropriate gate voltage whereby said second transistor applies a forward bias to said first semiconductor body region relative to said source of said first transistor.

2. The device as defined by claim 1 wherein said first transistor is larger than said second transistor.