×

Scalable parallel processing systems wherein each hypernode has plural processing modules interconnected by crossbar and each processing module has SCI circuitry for forming multi-dimensional network with other hypernodes

  • US 5,560,027 A
  • Filed: 12/15/1993
  • Issued: 09/24/1996
  • Est. Priority Date: 12/15/1993
  • Status: Expired due to Term
First Claim
Patent Images

1. A processing system comprising:

  • first processing circuitry including a processor and a partially global memory coupled by associated control circuitry to a first crossbar and a first coherent interconnect network;

    second processing circuitry including a processor and a partially global memory coupled by associated control circuitry to said first crossbar and a second coherent interconnect network;

    third processing circuitry including a processor and a partially global memory coupled by associated control circuitry to a second crossbar and said first coherent interconnect network; and

    fourth processing circuitry including a processor and a partially global memory coupled by associated control circuitry to said second crossbar and said second coherent interconnect network.

View all claims
  • 4 Assignments
Timeline View
Assignment View
    ×
    ×