Method of manufacturing a semiconductor device

• US 5,563,085 A
• Filed: 10/25/1994
• Issued: 10/08/1996
• Est. Priority Date: 03/01/1993
• Status: Expired due to Term

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation), Toshiba Corporation
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Kohyama, Yusuke
• Primary Examiner(s): Thomas, Tom
• Application Number:
  US08/328,814
• Time in Patent Office: 714 Days
• Field of Search: 437/47, 437/48, 437/52, 437/60, 437/89, 437/162, 437/919, 257/301
• US Class Current: 438/245
• CPC Class Codes: H10B 12/37 the capacitor being at least partially in a trench in the substrate

Abstract

In formation of a DRAM, a silicon nitride film is used as a mask to simultaneously expose a semiconductor substrate serving as an active region where an MOSFET is formed and a portion of the periphery of a trench. Therefore, even if the alignment offset of a resist pattern occurs, an interval between adjacent memory cells does not change. The interval between the adjacent memory cells is constantly the same as that when no alignment offset of the resist patter occurs. That is, only an n-type diffusion layer of the memory cell formed at a position adjacent to the trench comes close to source and drain regions of the adjacent memory cell.

Claims

1. A method of manufacturing a semiconductor device comprising the steps of:

forming a trench in a semiconductor substrate;

forming an insulating film on an inner wall and a bottom surface of said trench;

filling said trench with a first semiconductor layer containing an impurity;

removing a portion of said insulating film from an upper portion of said inner wall of said trench;

using selective epitaxial growth for growing a second semiconductor layer on said semiconductor substrate, including said upper portion of said inner wall of said trench, and said first semiconductor layer;

diffusing the impurity in said first semiconductor layer to form a diffusion layer in said second semiconductor layer; and

forming a MOSFET having source and drain regions on said second semiconductor layer, one of said source and drain regions overlapping with said diffusion layer.

2. The method according to claim 1, wherein the conductivity type of said first semiconductor layer and the conductivity type of said source and drain regions of said MOSFET are the same.

3. The method according to claim 1, wherein the step of diffusing the impurity in said first semiconductor layer forms a diffusion layer in said second semiconductor layer and said semiconductor substrate adjacent to said first semiconductor layer at said upper portion of said trench.

4. A method of making a semiconductor memory device comprising the steps of:

forming a first insulating film over a semiconductor substrate;

forming a trench in said semiconductor substrate through said first insulating film;

forming a second insulating film over an inner wall and a bottom surface of said trench;

filling said trench with a first semiconductor layer doped with an impurity;

forming a third insulating film on said first semiconductor layer;

depositing a fourth insulating film over said first insulating film and said third insulating film;

using said fourth insulating film as a mask, removing a portion of said first insulating film and said third insulating film so as to expose a portion of said semiconductor substrate and said first semiconductor layer;

forming a second semiconductor layer on said exposed portion of said semiconductor substrate and said exposed portion of said first semiconductor layer;

diffusing the impurity from said first semiconductor layer into said second semiconductor layer to form a diffusion layer; and

forming a transistor having source and drain regions on said second semiconductor layer, one of said source and drain regions of said transistor overlapping with said diffusion layer.

5. The method according to claim 4, wherein said first insulating film is silicon oxide, and said fourth insulating film is silicon nitride.

6. The method according to claim 4, wherein said first semiconductor layer is formed of polysilicon;

said second semiconductor layer is formed of single-crystal silicon and polysilicon; and

said transistor is formed on the single-crystal silicon of said second semiconductor layer.

7. The method according to claim 4, wherein a portion of said second insulating film is removed simultaneously with said first and third insulating film, using said fourth insulating film as a mask.

8. The method according to claim 4, wherein said second semiconductor layer is formed using a selective epitaxial growth method.

9. The method according to claim 7, wherein the diffusing step diffuses the impurity from said first semiconductor layer into said second semiconductor layer and said semiconductor substrate to form a diffusion layer.