Precision digital pulse phase generator
First Claim
1. A timing generator, comprising:
- reference signal means for generating a first digital signal;
delayed signal means connected to the reference signal means for generating a second digital signal having a controlled variable delay from said first digital signal according to an analog control signal;
conversion means connected to the reference signal means and the delayed signal means for transforming said first and second digital signals into a pulse-width modulated signal having a common fixed frequency and wherein said pulse-width modulated signal has a variable duty cycle proportional to a difference in timing of said second digital signal to said first digital signal;
integration means connected to the conversion means for respectively integrating said pulse-width modulated signal into a first analog signal having a magnitude proportional to said duty cycle;
servo control means connected to receive said integrated analog signals from the integration means and connected to provide said analog control signal to the delayed signal means that is proportional to a difference between said magnitudes of said respective analog signal; and
a digital-to-analog converter (DAC) connected to receive a digital control code and having an analog output connected to the servo control means that provides for a second analog signal summed with said first analog signal according to said digital control code;
wherein said digital control code provides for a linear control of the delay of said second digital signal compared to said first digital signal.
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Accused Products
Abstract
A timing generator comprises a crystal oscillator connected to provide an output reference pulse. A resistor-capacitor combination is connected to provide a variable-delay output pulse from an input connected to the crystal oscillator. A phase monitor is connected to provide duty-cycle representations of the reference and variable-delay output pulse phase. An operational amplifier drives a control voltage to the resistor-capacitor combination according to currents integrated from the phase monitor and injected into summing junctions. A digital-to-analog converter injects a control current into the summing junctions according to an input digital control code. A servo equilibrium results that provides a phase delay of the variable-delay output pulse to the output reference pulse that linearly depends on the input digital control code.
128 Citations
13 Claims
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1. A timing generator, comprising:
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reference signal means for generating a first digital signal; delayed signal means connected to the reference signal means for generating a second digital signal having a controlled variable delay from said first digital signal according to an analog control signal; conversion means connected to the reference signal means and the delayed signal means for transforming said first and second digital signals into a pulse-width modulated signal having a common fixed frequency and wherein said pulse-width modulated signal has a variable duty cycle proportional to a difference in timing of said second digital signal to said first digital signal; integration means connected to the conversion means for respectively integrating said pulse-width modulated signal into a first analog signal having a magnitude proportional to said duty cycle; servo control means connected to receive said integrated analog signals from the integration means and connected to provide said analog control signal to the delayed signal means that is proportional to a difference between said magnitudes of said respective analog signal; and a digital-to-analog converter (DAC) connected to receive a digital control code and having an analog output connected to the servo control means that provides for a second analog signal summed with said first analog signal according to said digital control code; wherein said digital control code provides for a linear control of the delay of said second digital signal compared to said first digital signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8)
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9. A timing generator, comprising:
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a crystal oscillator connected to a flip-flop and providing for a square-wave reference clock; a first series connected chain of inverters connected to said square-wave reference clock and providing for a timing reference output signal; a resistor-capacitor combination having a first resistor connected to said square-wave reference clock, a second resistor connected to receive a voltage control signal, and a capacitor connected across an output; a second series connected chain of inverters connected to said output of the resistor-capacitor combination and providing for a variable delay output signal; a first logic gate having a pair of inputs connected between a part of the second series connected chain of inverters and said flip-flop and providing for a variable duty-cycle pulse signal having a constant frequency fixed by the crystal oscillator; an op-amp having a first summing junction connected through a first integration resistor to the first logic gate and an output connected to provide said voltage control signal to the resistor-capacitor combination according to a difference in currents injected into said first summing junction; and a digital-to-analog converter (DAC) connected to inject a setpoint current into said first summing junction in linear relationship to a digital control code input signal; wherein said digital control code provides for a linear control of the delay of said variable delay output signal compared to said square-wave reference clock. - View Dependent Claims (10)
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11. A method for digitally controlling the phase delay between a reference clock and a sample clock, the method comprising the steps of:
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generating a reference frequency; generating a sampling frequency having the same frequency of said reference frequency but separated in phase; generating a fixed-frequency variable-duty-cycle pulse signal from said sampling frequency with a duty cycle that varies linearly with said phase difference between said sampling frequency and said reference frequency; integrating said variable-duty-cycle pulse signal to yield a first current proportional to the duty cycle of said variable-duty-cycle pulse signal; converting a digital control code into a control current connected to add to or subtract from said first current; and producing a control voltage connected to affect said phase difference between said sampling frequency and said reference frequency; wherein said digital control code provides for a linear control of the phase difference between said sampling frequency and said reference frequency. - View Dependent Claims (12, 13)
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Specification