Protected three-pin mosgated power switch with separate input reset signal level
First Claim
1. A control circuit for a power MOSgated circuit;
- said power MOSgated circuit having first and second main terminal pins and an input terminal pin whereby said input terminal pin controls the switching on and off of said power MOSgated circuit between its said main terminal pins;
said power MOSgated circuit including a MOSgated power device having first and second main electrodes connected to said first and second terminal pins and a gate electrode;
said control circuit including protective circuit means for monitoring at least one operating condition of said MOSgated power device and for turning off said MOSgated power device when said operating condition exceeds a given value;
said control circuit further including at least a first control MOSFET means coupled between said input terminal pin and said gate electrode for controlling the turn on and turn off of said MOSgated power device when a turn-on signal is applied to said input terminal pin;
first circuit means coupling said input terminal pin to said control MOSFET means to turn on and off said first control MOSFET means and said MOSgated power device in response to signals of first and second voltage magnitudes respectively;
a resettable latch circuit means having an input coupled to said protective circuit means and an output coupled to said first control MOSFET means whereby said latch means is switched to a first latch condition in response to an output of said protective circuit means thereby to disable said first control MOSFET means so that said MOSgated power device turns off; and
means coupling said resettable latch means to said input of said latch means for resetting said latch means in response to a signal of a third voltage magnitude which is lower than the lowest of said first and second voltage magnitudes, whereby said power MOSgated circuit is respectively turned on and off and is reset after a fault by three respective signals of first, second and third voltages which are distinguishable from one another applied to said input terminal pin.
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Accused Products
Abstract
A three-terminal Smart Power MOSgated device has short circuit, over-temperature and over-voltage protection and the like. The control circuit and the protective circuits are powered from an input or control pin connected to a microprocessor. The output of the microprocessor is connected to a resistive divider circuit such that three potentials can be selectively produced at the divider mode, and comprise an on-level signal, an off-level signal and a reset level signal respectively. The control circuit contains an R-S latch which turns on in the absence of a fault signal to connect the on and off signal levels to the MOSgated device. During a fault, the R-S latch disconnects the control circuit input from the MOSgated device, and is reset only by the reset level signal which is distinct from the off signal level which is incapable of resetting the R-S latch.
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Citations
12 Claims
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1. A control circuit for a power MOSgated circuit;
- said power MOSgated circuit having first and second main terminal pins and an input terminal pin whereby said input terminal pin controls the switching on and off of said power MOSgated circuit between its said main terminal pins;
said power MOSgated circuit including a MOSgated power device having first and second main electrodes connected to said first and second terminal pins and a gate electrode;
said control circuit including protective circuit means for monitoring at least one operating condition of said MOSgated power device and for turning off said MOSgated power device when said operating condition exceeds a given value;
said control circuit further including at least a first control MOSFET means coupled between said input terminal pin and said gate electrode for controlling the turn on and turn off of said MOSgated power device when a turn-on signal is applied to said input terminal pin;
first circuit means coupling said input terminal pin to said control MOSFET means to turn on and off said first control MOSFET means and said MOSgated power device in response to signals of first and second voltage magnitudes respectively;
a resettable latch circuit means having an input coupled to said protective circuit means and an output coupled to said first control MOSFET means whereby said latch means is switched to a first latch condition in response to an output of said protective circuit means thereby to disable said first control MOSFET means so that said MOSgated power device turns off; and
means coupling said resettable latch means to said input of said latch means for resetting said latch means in response to a signal of a third voltage magnitude which is lower than the lowest of said first and second voltage magnitudes, whereby said power MOSgated circuit is respectively turned on and off and is reset after a fault by three respective signals of first, second and third voltages which are distinguishable from one another applied to said input terminal pin. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12)
- said power MOSgated circuit having first and second main terminal pins and an input terminal pin whereby said input terminal pin controls the switching on and off of said power MOSgated circuit between its said main terminal pins;
Specification