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Ultra low-power integrated circuit for pseudo-baseband down-conversion of GPS RF signals

  • US 5,564,098 A
  • Filed: 09/13/1994
  • Issued: 10/08/1996
  • Est. Priority Date: 09/13/1994
  • Status: Expired due to Fees
First Claim
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1. A radio frequency down-conversion integrated circuit (IC) for use in a satellite navigation receiver to amplify L-band microwave radio transmissions received from orbiting satellites and to downconvert such signals to a pseudo-baseband signal for sampling, comprising:

  • a low-voltage bipolar-process emitter-coupled-logic (ECL) single semiconductor chip (10);

    a radio frequency (RF) pre-amplifier (11) disposed in the IC 10 and connected to amplify signals from an L-band microwave signal input (74);

    a first mixer (12) disposed in the IC (10) and connected to a first output (32) from a local oscillator frequency synthesizer section (32-54) and the RF preamplifier (11) for down-conversion of signals from said L-band microwave signal input (74) to approximately 175 MHz;

    an intermediate frequency (IF) amplifier (14) disposed in the IC (10) and connected to the first mixer (12) and having an external off-chip bandpass filter connection (16);

    an IF amplifier (18) disposed in the IC (10) and connected to said external off-chip bandpass filter connection (16);

    an in-phase (I) quadrature mixer (20) disposed in the IC (10) and connected to the IF amplifier (18) and a second output (40) from said local oscillator frequency synthesizer section (32-54);

    a pseudo-baseband amplifier (22) disposed in the IC (10) and connected to amplify signals from the in-phase (I) quadrature mixer (20) to an external off-chip baseband filter connection (24);

    a pseudo-baseband amplifier (26) connected to an I-sample/amplifier stage (28) and a quantizer (30) and all disposed in the IC (10) and connected to a control line (68) that provides for an external selection of whether said I-sample/amplifier stage (28) is to operate as a sampler or as an amplifier, wherein when operated as a sampler, the overall power consumption of the IC (10) is reduced, as the high-frequency, power-consuming signals driven out by quantizer (30) is eliminated and can change only at a sample clock rate;

    a quadrature-phase (Q) quadrature mixer (56) disposed in the IC (10) and connected to the IF amplifier (18) and a third output (42) from said local oscillator frequency synthesizer section (32-54);

    a pseudo-baseband amplifier (58) connected to an external off-chip baseband filter connection (60); and

    a pseudo-baseband amplifier (62) connected to a Q-sample/amplifier stage (64) and a quantizer (66) and all disposed in the IC (10) and connected to said control line (68) that further provides for an external selection of whether said Q-sample/amplifier stage (64) is to operate as a sampler or as an amplifier, wherein when operated as a sampler, the overall power consumption of the IC (10) is reduced, as the high-frequency, power-consuming signals driven out by quantizer (66) is eliminated and can change only at said sample clock rate.

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