Variable-length decoder for bit-stuffed data
First Claim
1. A variable-length decoding apparatus for variable-length-decoding data transmitted in the form of a bitstream, said data having been bit-stuffed and variable-length-encoded into a predetermined number of bits, said data further having been separated into a plurality of masses of macroblocks which form a number of frames, the initial portion of each frame including a predeterminedly set frame start code, the initial portion of each mass of macroblock including a predeterminedly set mass of macroblock start code, said variable-length decoding apparatus comprising:
- a first-in-first-out memory for storing transmitted data and sequentially outputting a predetermined number of bits of said data beginning with firstly stored bits, said storing and sequential outputting of said data occurring every time a read signal is input to said memory;
a decoder for variable-length-decoding data input thereto in response to a control signal received thereto, said decoder generating a data request signal every time the number of bits of said data input thereto equals a predetermined number, said decoder generating an end-of-block error signal when an end-of-block data signal is not received thereto in one of a plurality of block data intervals;
a decoding interface device for generating said read signal in response to a start signal and said data request signal received thereto, said data request signal being output from said decoder, said interface device receiving and subsequently storing said predetermined number of data bits from said first-in-first-out memory in response to said read signal, said interface device interrupting generation of said read signal if one of said frame start code and said mass of macroblock start code is detected from said input data bits, said interface device supplying said predetermined number of bits of said input data to said decoder when an initialization signal is received thereto; and
a timing controller for generating said start signal in each of a plurality of frame intervals, said controller generating said initialization signal in each of a plurality of masses of macroblock intervals, said start and said initialization signals being supplied to said decoding interface device, said timing controller generating a new start signal to be supplied to said decoder if said end-of-block signal is input thereto, said timing controller generating a signal supplied to said decoder for controlling said variable-length-decoding operation.
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Abstract
A variable-length decoder variable-length-decodes a received variable-length-encoded data. The variable-length-encoded data is bit-stuffed in each data block to create data portions with a predetermined number of bits. Frame start codes representing a start of each frame and mass of macroblock start codes distinguishing between a plurality of masses of macroblocks are inserted into the data. Synchronization of data between frames and masses of macroblocks are accomplished via: a first-in-first-out (FIFO) memory which stores encoded data; a decoder which variable-length-decodes the input data in response to a control signal and generates an end-of-block (EOB) error signal when an EOB is not found; a decoding interface which interfaces between the decoder and a timing controller; and a timing controller which synchronizes decoding by use of start and initialization signals.
78 Citations
6 Claims
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1. A variable-length decoding apparatus for variable-length-decoding data transmitted in the form of a bitstream, said data having been bit-stuffed and variable-length-encoded into a predetermined number of bits, said data further having been separated into a plurality of masses of macroblocks which form a number of frames, the initial portion of each frame including a predeterminedly set frame start code, the initial portion of each mass of macroblock including a predeterminedly set mass of macroblock start code, said variable-length decoding apparatus comprising:
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a first-in-first-out memory for storing transmitted data and sequentially outputting a predetermined number of bits of said data beginning with firstly stored bits, said storing and sequential outputting of said data occurring every time a read signal is input to said memory; a decoder for variable-length-decoding data input thereto in response to a control signal received thereto, said decoder generating a data request signal every time the number of bits of said data input thereto equals a predetermined number, said decoder generating an end-of-block error signal when an end-of-block data signal is not received thereto in one of a plurality of block data intervals; a decoding interface device for generating said read signal in response to a start signal and said data request signal received thereto, said data request signal being output from said decoder, said interface device receiving and subsequently storing said predetermined number of data bits from said first-in-first-out memory in response to said read signal, said interface device interrupting generation of said read signal if one of said frame start code and said mass of macroblock start code is detected from said input data bits, said interface device supplying said predetermined number of bits of said input data to said decoder when an initialization signal is received thereto; and a timing controller for generating said start signal in each of a plurality of frame intervals, said controller generating said initialization signal in each of a plurality of masses of macroblock intervals, said start and said initialization signals being supplied to said decoding interface device, said timing controller generating a new start signal to be supplied to said decoder if said end-of-block signal is input thereto, said timing controller generating a signal supplied to said decoder for controlling said variable-length-decoding operation. - View Dependent Claims (2, 3, 4, 5, 6)
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Specification