Portable computer system with adaptive power control parameters

• US 5,566,340 A
• Filed: 06/22/1994
• Issued: 10/15/1996
• Est. Priority Date: 02/14/1991
• Status: Expired due to Term

• Current Assignee: Dell USA LP (Dell Technologies Inc.)
• Original Assignee: Dell USA LP (Dell Technologies Inc.)
• Inventors: Stewart, Gregory N., Sato, N. Albert, Startup, Warren W.
• Primary Examiner(s): AUVE, GLENN ALLEN
• Application Number:
  US08/263,907
• Time in Patent Office: 846 Days
• Field of Search: 395/750, 395/575, 364/707, 371/66, 371/12, 371/14
• US Class Current: 713/323
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode

Abstract

A portable electronic system which includes a smart power-management controller. The power-management controller is programmable to vary its operational parameters (such as the time without input which will send the system into a standby mode). The power-management controller also has the capability to self-program at least some of these parameters: thus, for example, if a user repeatedly demands a system power-up soon after the system had been placed into standby mode, the inactivity period required for entering standby mode will be increased.

Claims

1. A method of operating a portable computer system, which includes at least one microprocessor, at least one input device, and one or more output devices, including a display, comprising the operations of:

selectably operating said system in any one of a plurality of modes of operation, said modes including at least one normal mode and at least one standby mode, wherein

in said normal mode, said microprocessor is allowed to operate at a predetermined clock speed, and said display is allowed to provide optimal output, and

in said standby mode, at least one of said input and output devices is not allowed to operate at full power;

automatically entering said standby mode and exiting from said normal mode whenever a programmable inactivity timeout duration has elapsed;

entering said normal mode and exiting said standby mode whenever bus activity occurs; and

modifying a value of said inactivity timeout duration so that said inactivity timeout duration is increased in response to occurrences where said standby mode is exited prior to the elapse of a first time period after said inactivity timeout duration, and is decreased in response to occurrences where activity ceases prior to the elapse of a second time period before said inactivity timeout duration occurs, said first time period being shorter than said second time period.

2. The method of claim 1, wherein said value of said inactivity timeout duration is modified in response to said occurrences after said inactivity timeout duration has occurred.

3. The method of claim 1, wherein the value of said inactivity timeout duration is modified in response to said occurrences after said inactivity timeout duration has occurred;

and wherein, at every power-up of the system from its lowest-power OFF state, the value of said inactivity timeout duration is restored to a programmable default value which is stored in nonvolathe memory.

4. The system of claim 1, further comprising permitting a user to enable or disable said operation of modifying.

5. An electronic system, comprising:

connections for at least one battery bank wherein said battery bank provides electrical power to said electronic system;

at least one microprocessor CPU subsystem, connected to access a system bus as master;

a plurality of other subsystems, each connected to access said system bus as slaves;

a programmable power-management controller, connected to monitor activity on said system bus and to cause at least one of subsystems to enter a standby mode of reduced power consumption after passage of an inactivity timeout duration of said at least one of said subsystems, and to cause said at least one of said subsystems to enter a normal mode from said standby mode when bus activity due to user input is detected, said controller including a circuit for modifying said inactivity timeout duration as a function of said detected user input; and

wherein said power-management controller increases the value of said inactivity timeout duration, in response to occurrences of bus activity due to user input prior to the elapse of a standby time period after said inactivity timeout duration has occurred, and temporarily decreases the value of said inactivity timeout duration, in response to occurrences where bus activity ceases before said inactivity timeout duration occurs.

6. An electronic system, comprising:

at least one microprocessor CPU subsystem, connected to access a system bus as master;

a plurality of other subsystems, each connected to access said system bus as slaves;

a programmable power-management controller, connected to monitor activity on said system bus and to cause at least one of said subsystems to enter a standby mode of reduced power consumption after passage of an inactivity timeout duration of said at least one of said subsystems, and to cause at least one of said subsystems to enter a normal mode from said standby mode when bus activity due to user input is detected, said controller a circuit for modifying said inactivity timeout duration as a function of said detected bus activity;

wherein said power-management controller increases the value of said inactivity timeout duration, in response to occurrences which may require exit from said standby mode prior to the elapse of a standby time period after said inactivity timeout duration has occurred, and temporarily decreases the value of said inactivity timeout duration, in response to occurrences where bus activity ceases before said inactivity timeout duration occurs.

7. An electronic system comprising,

at least one microprocessor CPU subsystem, connected to access a system bus as master;

a plurality of other subsystems, each connected to access said system bus as slaves;

one or more batteries, operatively connected to provide power to said subsystems;

a programmable power-management controller, connected to monitor activity on said system bus and to cause at least one of said subsystems to enter a standby mode of reduced power consumption after passage of an inactivity timeout duration of said at least one of said subsystems, and to cause said at least one of said subsystems to enter a normal mode from said standby mode when bus activity due to user input is detected, said controller including a circuit for modifying said activity timeout duration as a function of said detected bus activity; and

wherein said power-management controller increases the value of said inactivity timeout duration, in response to occurrences of bus activity due to user input prior to the elapse of a standby time period after said inactivity timeout duration has occurred, and temporarily decreases the value of said inactivity timeout duration, in response to occurrences where bus activity ceases before said inactivity timeout duration occurs.

8. A method of operating a portable computer system, which includes at least one microprocessor, at least one input device, and one or more output devices, including a display, comprising the operations of:

operating said system in any one of a plurality modes of operation, said modes including at least one normal mode and at least one standby mode, wherein

in said normal mode, said microprocessor is allowed to operate at a predetermined clock speed, and said display is allowed to provide optimal output, and

in said standby mode, at least one of said input and output devices is not allowed to operated at full power;

automatically entering said standby mode and exiting said normal mode whenever a programmable inactivity timeout duration has elapsed;

entering said mode and exiting said standby mode whenever user input occurs;

wherein the value of said inactivity timeout duration is increased in response to occurrences of bus activity due to user input prior to the elapse of a standby time period after said inactivity timeout duration has occurred, and is temporarily decreased in response to occurrences where bus activity ceases before said inactivity timeout duration occurs; and

permitting a user reprogram a default value of said inactivity timeout duration, and to enable and disable said operation of modifying.

9. An electronic system, comprising;

connections for at least one battery bank wherein said battery bank provides electrical power to said electronics system;

at least one microprocessor CPU subsystem, connected to access a system bus as master;

a plurality of other subsystems, each connected to access said system bus as slaves;

a programmable-management controller, connected to monitor activity on said system bus and to cause at least one of said subsystems to enter a standby mode of reduced power consumption after passage of an inactivity timeout duration of said at least one if said subsystems, and to cause said at least one of said subsystems to enter a normal mode from said standby mode when bus activity due to user input is detected, said controller including a circuit for modifying said inactivity timeout duration as a function of said detected user input;

wherein said power-management controller modifies the value of said inactivity timeout duration, in response to said occurrences after said inactivity timeout duration has occurred; and

wherein said power-management controller modifies the value of said inactivity timeout duration in response to occurrences of bus activity due to user input prior to the elapse of a standby time period after said inactivity time out duration has occurred.

10. The system of claim 9 wherein, at every power-up of the system from its lowest-power OFF state, the value of said inactivity timeout duration is restored to a programmable default value is stored in nonvolathe memory.

11. The system of claim 9, wherein said power-management controller is programmable to define a default value for said inactivity timeout duration.

12. The system of claim 9, wherein said power-management controller is programmable to enable or disable said circuit.

13. The system of claim 9, wherein said power-management controller comprises a microcontroller.

14. An electronic system, comprising:

at least one microprocessor CPU subsystem, connected to access a system bus as master;

a plurality of other subsystems, each connected to access said system bus as slaves;

a programmable power-management controller, connected to monitor activity on said system bus and to cause at least one of said subsystems to enter a standby mode of reduced power consumption after passage of an inactivity timeout duration of said at least one of said subsystems, and to cause at least one of said subsystems to enter a normal mode from said standby mode when bus activity due to user input is detected, said controller including a circuit for modifying said inactivity timeout duration as a function of said detected bus activity;

wherein said power-management controller modifies the value of said inactivity timeout duration, in response to said occurrences after said inactivity timeout duration has occurred; and

wherein said power-management controller modifies the value of said inactivity timeout duration in response to occurrences which may require exit from said standby mode prior to the elapse of a standby time period after said inactivity timeout duration has occurred.

15. The system of claim 14 wherein, at every power-up of the system from its lowest-power OFF state, the value of said inactivity timeout duration is restored to a programmable default value which is stored in nonvolathe memory.

16. The system of claim 14, wherein said power-management controller is programmable to enable or disable said circuit.

17. The system of claim 14 wherein said power-management controller comprises a microcontroller.

18. The system of claim 14, further comprising at least one for supplying electrical power to said electronic system.

19. The system of claim 14, further comprising at least one photovoltaic cell for supplying electrical power to said electronic system.

20. An electronic system, comprising:

at least one microprocessor CPU subsystem, connected to access a system bus as master;

a plurality of other subsystems, each connected to access said system bus as slaves;

one or more batteries, operatively connected to provide power to said subsystems;

a programmable power-management controller, connected to monitor activity on said system bus and to cause at least one of said subsystems to enter a standby mode of reduced power consumption after passage of an inactivity timeout duration of said at least one of said subsystems, and to cause said at least one of said subsystems to enter a normal mode from said standby mode when bus activity due to user input is detected, said controller including a circuit for modifying said inactivity timeout duration as a function of said detected bus activity;

wherein said power-management controller modifies the value of said inactivity timeout duration, in response to said occurrences after said inactivity timeout duration has occurred; and

wherein said power-management controller modifies the value of said inactivity timeout duration in response to occurrences of bus activity due to user input prior to the elapse of a standby time period after said inactivity timeout duration has occurred.

21. The system of claim 20 wherein, at every power-up of the system from its lowest-power OFF state, the value of said inactivity timeout duration is restored to a programmable default value which is stored in nonvolathe memory.

22. The system of claim 20, wherein said power-management controller is programmable to enable or disable said circuit.

23. The system of claim 20, wherein said power-management controller are rechargeable batteries.

24. The system of claim 20, wherein said one or more batteries are rechargeable batteries.

25. An electronic system, comprising:

connections for at least one battery bank wherein said battery bank provides electrical power to said electronic system;

at least one microprocessor CPU subsystem, connected to access a system bus as master;

a plurality of other subsystems, each connected to access said system bus as slaves;

a programmable power-management controller, connected to monitor activity on said system bus and to cause at least one of said subsystems to enter a standby mode of reduced power consumption after passage of an inactivity timeout duration of said at least one of said subsytems, and to cause said at least one of said subsystems to enter a normal mode from said standby mode when bus activity due to user input is detected, said controller including a

circuit for modifying said inactivity timeout duration as a function of said detected user input;

wherein said power-management controller modifies the value of said inactivity timeout duration in response to occurrences of bus activity due to user input prior to the elapse of a standby time period after said inactivity timeout duration has occurred; and

wherein said power-management controller is programmable to modify the value of said inactivity timeout duration, in response to said occurrences of user input after said inactivity timeout duration has occurred, either temporarily or permanently.