Method of construction for multi-tiered cavities used in laminate carriers

• US 5,566,448 A
• Filed: 06/06/1995
• Issued: 10/22/1996
• Est. Priority Date: 06/06/1995
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Walsh, James P., Bhatt, Ashwinkumar C., Duffy, Thomas P., Knight, Jeffrey A.
• Primary Examiner(s): Schwartz, Larry I.
• Assistant Examiner(s): Coley, Adrian
• Application Number:
  US08/470,389
• Time in Patent Office: 504 Days
• Field of Search: 29/840, 29/832, 29/852, 257/684, 174/52.1, 174/52.2, 361/737, 361/761, 361/762-764, 361/820, 156/253
• US Class Current: 29/847
• CPC Class Codes: H01L 21/4857 Multilayer substrates multilayer metallisation on monolayer substrate H01L21/4846
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 23/13 characterised by the shape
• CPC Class Codes: H01L 23/49833 the chip support structure consisting of a plurality of insulating substrates
• CPC Class Codes: H01L 23/5385 Assembly of a plurality of insulating substrates
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: Y10T 29/4913 Assembling to base an electrical component, e.g., capacitor, etc.
• CPC Class Codes: Y10T 29/49156 with selective destruction of conductive paths
• CPC Class Codes: Y10T 29/49165 by forming conductive walled aperture in base

Abstract

A method of forming an I/C chip mounting module, and for mounting an I/C chip thereon, is disclosed. A rigid cap and substrate are provided. A bottomed cavity is routed in the cap, and the substrate has circuitry formed thereon. The cap and substrate are laminated together with bond pads, which connect to the circuitry being disposed in the cavity. After circuitization of the exposed surface of the cap and drilling and plating of vias, the material of the cap overlying the cavity is removed to expose the bond pads. Thereafter, an I/C chip is connect to the pads.

Claims

1. A method of forming a laminated structure comprising the steps of:

providing first and second relatively rigid planar elements, each having first and second opposed surfaces,

forming a bottomed cavity in said first element, said cavity having a boundary surface extending from the first surface thereof and terminating adjacent to, but spaced from, said second surface of said first element,

forming electrical circuitry on said first surface of said second element, said electrical circuitry including bond pads arranged in a pattern corresponding to the configuration of said boundary surface of said cavity in said first element,

joining said first and second elements together with the first surface of each element in opposed juxtaposed relationship to thereby form a structure having a closed internal cavity, with said bond pads being located within said cavity,

forming electrical circuitry on said second surface of said first element;

forming electrical connection between the electrical circuitry on said first surface of said second element and said electrical circuitry on said second surface of said first element,

removing the portion of said first element covering said cavity to thereby provide an opening from said second surface of said first element to said cavity, and

providing an integrated circuit chip, and bonding said integrated circuit chip to said bond pads on the second element.

2. The method as defined in claim 1 wherein material is removed from said second element to form a through opening surrounded by said bond pads.

3. The method of claim 2 wherein a chip mounting structure is formed across said opening in said second element, and said I/C chip is mounted thereon.

4. The method of claim 3 wherein said chip structure is formed of a heat conducting material to thereby form a heat sink.

5. The method as defined in claim 1 wherein said cavity is generally ring-shaped surrounding a pedestal circumscribed by said cavity, and which pedestal extends substantially to the first surface of said first element, and wherein said pedestal is removed after circuitization of said second surface of said first element.

6. The method as defined in claim 5 wherein the material of said second element adjacent said pedestal is also removed to thereby form an opening through said laminated structure, and a chip mounting structure is connected across said opening in said second element.

7. The method as defined in claim 6 wherein said cavity is octagonal.

8. The method as defined in claim 1 wherein the elements are epoxy circuit board elements and are joined by laminating.

9. The method as defined in claim 8 wherein said epoxy elements are partially cured before laminating and are connected by the application of heat and pressure.

10. The method as defined in claim 9 wherein a film of epoxy is used to laminate said first and second elements together.