Semiconductor device having a crystallized island semiconductor layer

• US 5,567,967 A
• Filed: 06/27/1994
• Issued: 10/22/1996
• Est. Priority Date: 06/28/1993
• Status: Expired due to Term

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Kusumoto, Naoto
• Primary Examiner(s): Ngo, Ngan V.
• Application Number:
  US08/265,750
• Time in Patent Office: 848 Days
• Field of Search: 257/52, 257/57, 257/59, 257/64, 257/66, 257/290, 257/349, 257/350, 257/352, 257/353, 257/354, 257/659, 359/59
• US Class Current: 257/353
• CPC Class Codes: G02F 1/133512 Light shielding layers, e.g. black matrix G02F1/136209 takes precedence
• CPC Class Codes: G02F 1/13454 Drivers integrated on the active matrix substrate G02F1/136277 takes precedence
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate

Abstract

A semiconductor device comprises a transparent insulating substrate, a first insulating layer, a semiconductor layer, a second insulating layer, and an island-like semiconductor layer in order from the side of the substrate. When the laser light is irradiated from the upper side of the semiconductor device the laser light irradiated to the portions having no island-like semiconductor layer thereon is absorbed by the semiconductor layer after being transmitted through the second insulating layer and the heat generates in the semiconductor layer. Heat diffusion occurs thereafter. At the same time, the energy of laser light by laser radiation from the upper side of the semiconductor device is absorbed in the island-like semiconductor layer. The energy is accumulated as the heat in the island-like semiconductor layer and the second insulating layer to suppress the heat diffusion into the substrate.

Claims

1. A semiconductor device comprising:

an insulating substrate;

a semiconductor layer formed on the insulating substrate, the semiconductor layer comprising amorphous silicon having a light-shield layer;

an insulating layer formed on the semiconductor layer; and

a crystallized island semiconductor layer formed on the insulating layer, the crystallized island semiconductor layer comprising silicon having a source and a drain.

2. The device of claim 1, wherein the insulating substrate includes a transparent insulating substrate.

3. The device of claim 1, wherein the semiconductor layer comprises an amorphous semiconductor.

4. The device of claim 3, wherein the amorphous semiconductor includes hydrogen of 5 atoms % or less.

5. The device of claim 3, wherein the semiconductor layer further comprises a crystallized semiconductor layer.

6. The device of claim 3, wherein the insulating substrate includes a transparent insulating substrate.

7. The device of claim 1, wherein the semiconductor layer comprises a first region located under the crystallized island semiconductor layer and a second region other than the first region, and the first region comprises an amorphous region and the second region comprises a crystallized region.

8. The device of claim 7, wherein the amorphous region includes hydrogen of 5 atoms % or less.

9. The device of claim 7, wherein the crystallized region is crystallized 80% or more.

10. The device of claim 7, wherein the semiconductor layer includes a substantially non-crystallized region which is crystallized 10% or less

11. The device of claim 7, wherein the insulating substrate includes a transparent insulating substrate.

13. The device of claim 1, wherein the semiconductor layer comprises a first region located under the crystallized island semiconductor layer and a second region other than the first region, the first region has light-absorbing, and the second region has transparent.

14. The device of claim 1, wherein the semiconductor layer comprises an intrinsic semiconductor.

15. The device of claim 3, wherein the semiconductor layer comprises an intrinsic semiconductor.

16. The device of claim 7, wherein the semiconductor layer comprises an intrinsic semiconductor.

17. The device of claim 13, wherein the semiconductor layer comprises an intrinsic semiconductor.

18. The device of claim 1, wherein the semiconductor layer has 500 Å

to 1 μ

m in thickness.

19. The device of claim 3, wherein the semiconductor layer has 500 Å

to 1 μ

m in thickness.

20. The device of claim 7, wherein the semiconductor layer has 500 Å

to 1 μ

m in thickness.

21. The device of claim 13, wherein the semiconductor layer has 500 Å

to 1 μ

m in thickness.

22. The device of claim 1, wherein the insulating layer comprises a material having a melting point higher than that of the material constituting the semiconductor layer.

23. The device of claim 3, wherein the insulating layer comprises a material having a melting point higher than that of the material constituting the semiconductor layer.

24. The device of claim 7, wherein the insulating layer comprises a material having a melting point higher than that of the material constituting the semiconductor layer.

25. The device of claim 13, wherein the insulating layer comprises a material having a melting point higher than that of the material constituting the semiconductor layer.

26. The device of claim 1, wherein the semiconductor layer includes one of molybdenum atoms and tungsten atoms to be added at 0.1 to 10 atoms %.

27. The device of claim 3, wherein the semiconductor layer includes one of molybdenum atoms and tungsten atoms to be added at 0.1 to 10 atoms %.

28. The device of claim 7, wherein the semiconductor layer includes one of molybdenum atoms and tungsten atoms to be added at 0.1 to 10 atoms %.

29. The device of claim 13, wherein the semiconductor layer includes one of molybdenum atoms and tungsten atoms to be added at 0.1 to 10 atoms %.

34. The device of claim 1 further comprising a gate electrode formed on the crystallized island semiconductor layer.

38. The device of claim 1 wherein the crystallized region has higher crystallinity than that of the amorphous region.

12. A semiconductor device comprising:

an insulating substrate;

a semiconductor layer formed on the insulating substrate;

an insulating layer formed on the semiconductor layer; and

a crystallized island semiconductor layer formed on the insulating layer, wherein the semiconductor layer comprises a first region located under the crystallized island semiconductor layer and a second region other than the first region, and the first region comprises an amorphous region and the second region comprises a crystallized region.

35. The device of claim 12 further comprising a gate electrode formed on the crystallized island semiconductor layer.

39. The device of claim 12 wherein the crystallized region has higher crystallinity than that of the amorphous region.

30. A semiconductor device comprising:

an insulating substrate;

a semiconductor layer formed on the insulating substrate;

an insulating layer formed on the semiconductor layer; and

a crystallized island semiconductor layer formed on the insulating layer,

wherein the semiconductor layer comprises a first region located under the crystallized island semiconductor layer and a second region other than the first region, and the first region has light-absorbing, and the second region has transparent.

36. The device of claim 30 further comprising a gate electrode formed on the crystallized island semiconductor layer.

40. The device of claim 30 wherein the crystallized region has higher crystallinity than that of the amorphous region.

41. The device of claim 30 wherein the first region has nontransparent.

31. A semiconductor device comprising:

a transparent substrate;

an active semiconductor layer comprising silicon formed over said transparent substrate; and

a light-blocking layer adjacent to said active semiconductor layer between said active semiconductor layer and said transparent substrate, wherein the light-blocking layer comprises amorphous silicon.

32. The device of claim 31 wherein the transparent substrate comprises a glass substrate.

33. The device of claim 31 wherein the active semiconductor layer comprises crystalline silicon.

37. The device of claim 31 further comprising a gate electrode formed on the active semiconductor layer.