Flash memory wear leveling system providing immediate direct access to microprocessor

• US 5,568,423 A
• Filed: 04/14/1995
• Issued: 10/22/1996
• Est. Priority Date: 04/14/1995
• Status: Expired due to Term

• Current Assignee: Unisys Corporation
• Original Assignee: Unisys Corporation
• Inventors: Jou, Edwin, Jeppesen, James H. III
• Primary Examiner(s): Nelms, David C.
• Assistant Examiner(s): MAI, SON LUU
• Application Number:
  US08/422,119
• Time in Patent Office: 557 Days
• Field of Search: 365/218, 365/900, 365/185.11, 365/185.29, 365/189.33, 365/230.03, 395/401, 395/430
• US Class Current: 365/185.33
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/1056 Simplification
• CPC Class Codes: G06F 2212/7211 Wear leveling
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
• CPC Class Codes: G11C 16/3495 Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically

Abstract

A system for equal utilization of blocks of flash memory whereby a processor using algorithmic software functions to sort the usage-value of each block of flash memory so that the system will select the least-used memory block for the next cycle of memory usage. The described system provides direct and immediate access of flash memory to the microprocessor without any intermediate modules or vias which would delay that access. Further, a minimal amount of overhead header information is only required for each flash memory block thus allowing greater areas of memory usage for instructional code data.

Claims

1. In a digital network using a central processor and memory modules including a flash memory, a method for equitable utilization of each block of memory in said flash memory comprising the steps of:

(a) connecting said processor directly to said flash memory for immediate access;

(b) assigning a header area in each block of flash memory which registers the number of times that the block has been utilized and erased, said header also specifically identifying each individual block of said flash memory;

(c) assembling a list identifying each said flash memory block and its numerical value of utilization-erase cycles;

(d) sorting said list into a free block list which organizes each identified block of flash memory in order of least-used block at the top, to the most-used block at the bottom of the list;

(e) selecting the least-used block for erasure and storage utilization of newly placed data therein.

2. The method of claim 1 which includes the step of:

(f) limiting the size of said header area overhead to no more than 10 overhead words for each 64000 words of available data in said flash memory block.

3. A method for providing direct memory access by a microprocessor to a flash memory means while minimizing the time of access and overhead data required, comprising the steps of:

(a) connecting said microprocessor directly to said flash memory for immediate access;

(b) establishing a flash memory means having multiple blocks of instruction codes wherein each block includes a header of less than ten words for each 64,000 words of instruction code, said header including a block identification number and a value representing the number of times the particular flash memory block has been erased;

(c) reading, by said microprocessor means, of the block header information to determine the number of times that the flash memory block has been erased;

(d) establishing a memory unit list which identifies each block and the number of times it has been erased, said list being assembled in ascending order to indicate the least-used block of flash memory up to the most used block of flash memory;

(e) selecting by said microprocessor means, of the flash memory block having the least used value of memory erasures as the next flash memory block area to be utilized;

(f) erasing the selected least-used flash memory block and writing in new instruction code data including incrementing by one the value of the usage field in the header;

(g) utilizing an auxiliary memory to hold the header information of the flash memory block unit to be next utilized while said flash memory block unit is being erased;

(h) returning said temporarily stored header information to the next used flash memory block with a usage value incremented by one.

4. A network for insuring that a central microprocessor means will make equal utilization of the multiple memory block units of a flash memory means while having direct access and connection to said flash memory means and also minimizing the amount of overhead and time delay involved, said network comprising:

(a) said microprocessor means, having direct access connection to said flash memory means, for initiating command cycles for erasing and writing into a selected block of said flash memory means including;

(a1) means to select that block of flash memory having the smallest number of erase-write cycles;

(b) first memory means for holding instruction codes for said microprocessor;

(c) second memory means for holding software instruction codes to enable said microprocessor to list and sort each block unit according to its header value meter field which indicates the numbered value of its erase-write cycles;

(d) scratch memory means for holding a current list of erase-write cycle usage values of each one of said flash memory block units of said flash memory means, including;

(d1) means for temporary storage of header data of any selected flash memory block which is being erased for subsequent usage;

(e) said flash memory means for holding multiple block units of memory storage of instruction codes where each block unit includes;

(e1) a header area for identifying the particular flash memory block and including;

(e1a) said meter field for continually indicating the utilization number value of that block in terms the number of erase-write cycles it has been subjected to.