Image sensor having a multi-layered printed circuit board with increased parallel-plate capacitance and method for manufacturing the same
First Claim
1. An image sensor comprising:
- a plurality of sensor chips for sensing an image and outputting a signal to form a part of a parallel signal, wherein each of the sensor chips has a plurality of photoelectric conversion devices, an internal signal line coupled to the plurality of photoelectric conversion devices, an internal ground line coupled to the plurality of photoelectric conversion devices and a plurality of switches for coupling the signal line and the ground line;
a printed circuit board for mounting the plurality of sensor chips thereon and for forming a signal circuit wherein the signal circuit receives the parallel signal from the plurality of sensor chips, converts the parallel signal to a serial signal, and outputs the serial signal;
wherein the printed circuit board has a substrate as a base, a first conductor layer placed on one side of the substrate, having an external ground line coupled to the internal signal line, a second conductor layer having an external signal line coupled to the internal signal line, and an insulator layer between the first and the second conductor layers for creating a capacitance between the external signal line and the external ground line.
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Accused Products
Abstract
A multi-layered printed circuit board forms a base of a sensor board. Sensor chips are mounted on the multi-layered printed circuit board. The multi-layered printed circuit board is composed of a substrate, a first conductor layer, an internal insulator layer, a second conductor layer, and a surface insulator layer. An analog ground line is formed of the electrolytic copper foil of the first conductor layer by chemical etching. A signal line is formed of the electrolytic copper foil of the second conductor layer by chemical etching. Insulator layers are formed between the first conductor layer and the second conductor layer to generate a distributed capacitance between the signal line and the analog ground line for filtering out noise and improving performance.
29 Citations
22 Claims
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1. An image sensor comprising:
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a plurality of sensor chips for sensing an image and outputting a signal to form a part of a parallel signal, wherein each of the sensor chips has a plurality of photoelectric conversion devices, an internal signal line coupled to the plurality of photoelectric conversion devices, an internal ground line coupled to the plurality of photoelectric conversion devices and a plurality of switches for coupling the signal line and the ground line; a printed circuit board for mounting the plurality of sensor chips thereon and for forming a signal circuit wherein the signal circuit receives the parallel signal from the plurality of sensor chips, converts the parallel signal to a serial signal, and outputs the serial signal; wherein the printed circuit board has a substrate as a base, a first conductor layer placed on one side of the substrate, having an external ground line coupled to the internal signal line, a second conductor layer having an external signal line coupled to the internal signal line, and an insulator layer between the first and the second conductor layers for creating a capacitance between the external signal line and the external ground line. - View Dependent Claims (2, 3, 4, 5)
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6. A multi-layered printed circuit board comprising:
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a substrate; a first conductor layer placed on one side of the substrate for providing a ground; a second conductor layer for providing a signal line; an insulator layer located between the first and the second conductor layers for creating a capacitance between the signal line and the ground; a surface insulator layer; and a circuit mounted on the surface insulator layer having a plurality of chips electrically coupled to the signal line and the ground. - View Dependent Claims (7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
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18. A method for manufacturing a board, comprising the steps of:
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forming a first conductor layer; forming a ground on the first conductor layer by chemical etching; forming an internal insulator layer next to the first conductor layer; forming a second conductor layer next to the insulator layer; forming a signal line on the second conduct layer by chemical etching; forming a surface insulator layer next to the second conductor layer; mounting chips on the surface insulator layer; and electrically coupling the chips to the signal line and ground. - View Dependent Claims (19, 20, 21, 22)
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Specification