Brushless motor drive circuit including a linear amplifier for sending and output signal based upon the detected back electromotive force voltage

• US 5,569,988 A
• Filed: 07/07/1994
• Issued: 10/29/1996
• Est. Priority Date: 07/15/1993
• Status: Expired due to Term

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Hitachi, Ltd.
• Inventors: Kokami, Yasuhiko, Kondo, Satoshi
• Primary Examiner(s): Martin, David S.
• Application Number:
  US08/271,642
• Time in Patent Office: 845 Days
• Field of Search: 318/254, 318/439, 318/138, 388/816-822, 388/920.1, 388/910
• US Class Current: 318/400.35
• CPC Class Codes: H02P 2209/07 Trapezoidal waveform
• CPC Class Codes: H02P 6/08 Arrangements for controlling the speed or torque of a single motor H02P6/10, H02P6/28 take precedence
• CPC Class Codes: H02P 6/10 Arrangements for controlling torque ripple, e.g. providing reduced torque ripple
• CPC Class Codes: H02P 6/14 Electronic commutators
• CPC Class Codes: H02P 6/34 Modelling or simulation for control purposes
• CPC Class Codes: Y10S 388/90 Specific system operational feature
• CPC Class Codes: Y10S 388/91 Operational/differential amplifier

Abstract

In a d.c. brushless motor drive circuit, the output amplifier produces a motor winding drive current with dulled rise/fall edges from a detected sinusoidal back e.m.f. voltage induced on the winding during the steady-state operation when the motor runs at the rated speed. The output amplifier includes a set of transistors each brought to a saturated conductive state or a cutoff state in accordance with the phase conduction sequence to connect one end of each motor winding to a ground voltage source, and another transistor operated continuously to connect the neutral point, which is opposite ends of the motor windings connected together, to a power voltage source.

Claims

1. A motor drive circuit for driving a motor, comprising:

an output amplifier for feeding a drive current for a winding of said motor;

an amplifier for detecting a sinusoidal back electromotive force voltage induced on the winding of said motor;

a phase compensation circuit for implementing a phase compensation for the detected back electromotive force voltage;

a matrix circuit for producing a digital pulse signal; and

a switching circuit having a first input terminal for receiving the phase compensated back electromotive force voltage as an output signal of said phase compensation circuit, a second input terminal for receiving the digital pulse signal as an output signal of said matrix circuit and an output terminal connected to an input terminal of said output amplifier, and operating to deliver one of the output signal of said phase compensation circuit and the output signal of said matrix circuit selectively to the input terminal of said output amplifier in response to a switching signal.

2. A motor drive circuit according to claim 1, wherein said switching circuit delivers the output signal of said phase compensation circuit to an input terminal of said output amplifier during the steady-state operation when said motor runs at a stated speed.

3. A motor drive circuit according to claim 1 further including a current control circuit, coupled to said output amplifier, for controlling an amount of the drive current fed from said output amplifier to the winding,

wherein the amount of the drive current is reduced by said current control circuit during the steady-state operation when said motor runs at the stated speed.

4. A motor drive circuit according to claim 1, wherein said motor is a Hall-sensorless brushless motor.

5. A motor drive circuit according to claim 1, further comprising:

an external terminal to be coupled to the winding of said motor, and

an attenuator,

wherein said linear amplifier has a first input terminal coupled to said external terminal and a second input terminal coupled to said external output terminal through said attenuator so that said linear amplifier can detect the back electromotive force voltage induced on the winding.

6. A motor drive circuit according to claim 1, wherein said motor drive circuit is formed on a single semiconductor substrate, and

wherein said motor drive circuit further comprises:

an external output terminal which is coupled to an output terminal of said output amplifier and which is to be coupled to the winding of said motor.

7. A motor drive circuit according to claim 6, further comprising:

an external terminal to be coupled to the winding of said motor, and

an attenuator,

wherein said amplifier has a first input terminal coupled to said external terminal and a second input terminal coupled to said external output terminal through said attenuator so that said amplifier can detect the back electromotive force voltage induced on the winding.

8. A motor drive circuit according to claim 7, further comprising:

a communication sequencer responsive to an input signal and for providing a timing signal to an input of said matrix circuit, wherein said timing signal defines a conduction phase of the winding of said motor.

9. A motor drive circuit according to claim 1,

wherein said switching circuit delivers the output signal of said compensation circuit to the input terminal of said output amplifier in response to the switching signal (MC) of a first level when said motor runs a rated speed, and

wherein said switching circuit delivers the output signal of said matrix circuit to the input terminal of said output amplifier in response to the switching signal of a second level different from the first level during a period after said motor has started until the motor speed reaches the rated speed.

10. A method of driving a Hall-sensorless motor comprising:

a first step of driving windings of said motor in synchronism with a clock signal at a starting of said motor;

a second step of detecting zero-cross points of back electromotive force voltages induced on the windings of said motor with respect to a voltage of a neutral point defining a common connection point of said windings and driving the windings of said motor based on the detected zero-cross points during a period after said motor has started until a motor speed reaches a rated speed; and

a third step of driving the windings of said motor based on phase information and amplitude information of the back electromotive force voltages after said motor speed reaches the rated speed.

11. A motor driving method according to claim 10, wherein the windings of said motor are driven in full-wave drive mode, in which driving currents for the windings flow through two windings alternately selected from the windings of said motor, during said first step,

wherein the windings of said motor are driven in half-wave drive mode, in which driving currents for the windings flow from the neutral point to the selected one of the windings of said motor, during said third step, and

wherein the second step includes a step of changing operation mode of the motor from the full-wave mode to the half-wave mode.

12. A motor drive circuit on a semiconductor substrate, for use with a motor including first, second and third coils, having first and second ends, wherein the first ends are commonly connected to form a neutral point, the motor drive circuit comprising:

first, second and third external terminals to be coupled to the second ends of the first, second and third coils, respectively;

a fourth external terminal to be coupled to the neutral point;

first, second and third output amplifiers having outputs coupled to the first, second and third external terminals, respectively;

first, second and third detection amplifiers detecting back electromotive force voltages to be induced on the first, second and third coils, and each having a first input, a second input and an output, the first inputs thereof being coupled to the fourth external terminal, and the second inputs thereof being coupled to the first, second and third external terminals, respectively;

first, second and third phase compensation circuits having inputs coupled to the outputs of the first, second and third detection amplifiers, respectively, and implementing phase compensations for the detected back electromotive force voltage;

a matrix circuit responsive to input signals and producing digital pulse signals; and

a switching circuit including first, second and third switching elements having first inputs coupled to the outputs of the first, second and third compensation circuits, respectively, to receive the phase compensated back electromotive force voltages from the first, second and third compensation circuits, second inputs coupled to receive the digital pulse signals from the matrix circuit, respectively, and outputs coupled to the inputs of the first, second and third output amplifiers, respectively,

wherein the switching circuit is responsive to a switching signal and outputs one of the phase compensated back electromotive force voltages and the digital pulse signals to the inputs of the first, second and third output amplifiers, respectively.

13. A motor drive circuit according to claim 12, further comprising:

attenuators coupled between the second inputs of the detection amplifiers and the first, second and third external terminals, respectively.

14. A motor drive circuit according to claim 13, further comprising:

a communication sequencer responsive to a signal and providing timing signals serving as the input signals to the matrix circuit, wherein the timing signals define conduction phases of the coils of the motor.

15. A motor drive circuit according to claim 14, further comprising:

an oscillator providing clock signals as the signal to the communication sequencer.

16. A motor drive circuit according to claim 15, further comprising:

means, coupled to the first, second, third and fourth external terminals, for detecting zero-cross points of the back electromotive force voltages with respect to a voltage on the fourth external terminal and providing zero-cross timing signals serving as the signal to the communication sequencer.

17. A motor drive circuit according to claim 16,

wherein the switching circuit delivers the compensated back electromotive force voltages to the inputs of the first to third output amplifiers in response to the switching signal of a first level when the motor runs a rated speed, and

wherein the switching circuit delivers the digital pulse signal to the inputs of the first to third output amplifiers in response to the switching signal of a second level difference from the first level during a period after the motor has started until the motor speed reaches the rated speed.

18. A motor drive circuit according to claim 12,

wherein the first to third output amplifiers each includes a first output transistor for feeding a drive current to the corresponding coil and a second output transistor for pulling a current from the corresponding coil, and

wherein, in response to output signals of the switching circuit, the selected one of the first output transistors and the selected one of the second output transistors are turned on so that the first output transistor in one of the first, second and third output amplifiers and the second transistor in another of the first, second and third output amplifiers are turned on.

19. A motor drive circuit according to claim 18, further comprising:

means responsive to a mode switching signal and for bringing all the first output transistors in the first, second and third output amplifiers into a cut-off state regardless of the output signals of the switching circuit and providing a current from a supply voltage source to the fourth external terminal.

20. A motor drive system according to claim 18, wherein the first and second output transistors in the first, and second and third output amplifiers are bipolar transistors of an NPN type.

21. A motor drive system according to claim 18, wherein the motor includes a spindle motor.

22. A motor drive system according to claim 21, wherein the motor drive system is a hard disk drive.

23. A motor drive system according to claim 21, wherein the motor drive system is a floppy disc drive.

24. A motor drive system comprising:

a motor having first, second and third coils each having a first end and a second end, wherein the second end of each of the first, second and third coils is commonly connected to form a neutral point;

a motor drive circuit, on a semiconductor substrate, having first, second, third and fourth external terminals coupled to the first end of each of the first, second and third coils and the neutral point, respectively, and fifth and sixth external terminals; and

a microcomputer, coupled to the fifth and sixth external terminals, controlling operations of the motor drive circuit;

wherein the motor drive circuit further comprises;

first, second and third output amplifiers having outputs coupled to the first, second and third external terminals, respectively;

first, second and third detection amplifiers detecting back electromotive force voltages induced on the first, second and third coils, and each having a first input, a second input and an output, the first inputs thereof being coupled to the fourth external terminal, and the second inputs thereof being coupled to the first, second and third external terminals, respectively;

first, second and third phase compensation circuits having inputs coupled to the outputs of the first, second and third detection amplifiers, respectively, and implementing phase compensations for the detected back electromotive force voltage;

a matrix circuit responsive to input signals and producing digital pulse signals;

a switching circuit including first, second and third switching elements having first inputs coupled to the outputs of the first, second and third compensation circuits, respectively, to receive the phase compensated back electromotive force voltages from the first, second and third compensation circuits, second inputs coupled to receive the digital pulse signals from the matrix circuit, respectively, and outputs coupled to the inputs of the first, second and third output amplifiers, respectively, wherein the switching circuit is responsive to a switching signal and outputs one of the phase compensated back electromotive force voltages and the digital pulse signals to the inputs of the first, second and third output amplifiers, respectively;

a zero-cross detection circuit, coupled to the first, second, third and fourth external terminals, detecting zero-cross points of the back electromotive force voltages with respect to a voltage on the fourth external terminal and providing an output signal representing the detected zero-cross points to the fifth external terminal so that the microcomputer uses the output signal of the zero-cross detection circuit as a rotation speed signal of the motor; and

a circuit, coupled to the sixth external terminal, responsive to a speed control signal from the microcomputer responding to the output signal and providing the switching signal to the switching circuit in accordance with the speed control signal so that the switching circuit provides the digital pulse signals to the inputs of the first, second and third output amplifiers, respectively, during the period after said motor has started until a rotation speed of the motor (M) reaches a predetermined speed and provides the phase compensated back electromotive force voltages to the inputs of the first, second and third output amplifiers, respectively, after the rotation speed of the motor reaches the predetermined speed.

25. A motor drive system according to claim 24, wherein the motor drive circuit further comprises:

attenuators coupled between the second inputs of the first, second and third detection amplifiers and the first, second and third external terminals, respectively.

26. A motor drive system according to claim 25, wherein the motor drive circuit further comprises:

a commutation sequence responsive to a signal and providing timing signals serving as the input signals to the matrix circuit, wherein the timing signals define conduction phases of the first, second and third coils of the motor.

27. A motor drive system according to claim 26, wherein the motor drive circuit further comprises:

an oscillator providing clock signals as the signal to the communication sequence.

28. A motor drive system according to claim 27, the output of zero-cross detection circuit is supplied to the communication sequence as the signal.

29. A motor drive system according to claim 28, wherein the predetermined speed corresponds to a rated speed.

30. A motor drive system according to claim 24, wherein the first, second and third output amplifiers each includes a first output transistor for feeding a drive current to the corresponding coil and a second output transistor for pulling a current from the corresponding coil, and

wherein, in response to output signals of the switching circuit, the selected one of the first output transistors and the selected one of the second output transistors are turned on so that the first output transistor in one of the first, second and third output amplifiers and the second transistor in another of the first, second and third output amplifiers are turned on.

31. A motor drive system according to claim 30, wherein the motor drive circuit further comprises:

a control circuit, responsive to a mode switching signal provided from the microcomputer and bringing all the first output transistors in the first, second and third output amplifiers into a cut-off state regardless of the output signals of the switching circuit and providing a current from a supply voltage source to the fourth external terminal.

32. A motor drive system according to claim 30, wherein the first and second output transistors in the first, second and third output amplifiers are bipolar transistors of an NPN type.