Phase monitor and protection apparatus

• US 5,570,258 A
• Filed: 05/11/1995
• Issued: 10/29/1996
• Est. Priority Date: 05/11/1995
• Status: Expired due to Fees

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: Manning, William R.
• Primary Examiner(s): Gaffin, Jeffrey A.
• Assistant Examiner(s): Leja, Ronald W.
• Application Number:
  US08/439,258
• Time in Patent Office: 537 Days
• Field of Search: 361/29, 361/30, 361/76-79, 361/85, 361/88, 361/89, 324/76.52, 324/521, 324/524
• US Class Current: 361/85
• CPC Class Codes: H02H 3/247 having timing means
• CPC Class Codes: H02H 3/253 for multiphase applications, e.g. phase interruption
• CPC Class Codes: H02H 7/097 against wrong direction of rotation

Abstract

A phase monitor and protection circuit is shown in which an impedance network (21, 23, 25) in a respective branch (20, 22, 24) connected to a neutral (26) is coupled to each phase of a three phase power supply (L1, L2, L3) to create a known voltage profile across the respective networks. A relay network (36) is coupled to one branch (20) and a control network (30) is coupled to a second branch (24) to monitor the voltage levels and deenergize the relay (R1) upon the occurrence of the reversal of any two phases or the loss of a phase. The control circuit can also be used to detect low voltage conditions and in a second embodiment provides a time delay network (44) to avoid nuisance tripping due to transient low voltage or brown out condition.

Claims

1. Phase monitor and protection circuit apparatus for use with a three phase AC power supply as a pilot duty control having a relay with contacts to be wired in series with a contactor coil comprising first, second and third unbalanced networks connected in a wye configuration, each impedance network being coupled to a phase connection terminal for connection to respective power source lines, the first and third impedance networks comprising resistive networks and the second impedance network comprising a capacitive network to establish a selected voltage profile across the impedance networks,

a relay network coupled to the first impedance network comprising a diode to rectify AC current conducted through the first impedance network to provide a relay voltage source rail for the relay network, first zener diode means coupled to the rail to provide a selected voltage level for driving a relay, a relay coil and a solid state switch means serially connected with the relay coil coupled to the rail,

a control logic network serially connected to the third impedance network comprising a full wave bridge rectifier to provide a control voltage source rail and common, the voltage level of the control voltage source rail being dependent upon the voltage level of the respective power source line to which the third impedance network is connected, a comparator having an inverting and a non-inverting input and an output transistor, second zener diode means coupled to the control voltage source rail to provide a fixed reference voltage, the reference voltage coupled to the inverting input, a voltage divider comprising first and second voltage divider resistors connected between the control voltage source rail and common, a junction formed between the first and second voltage divider resistors, the junction coupled to the non-inverting input, the output transistor of the comparator and the control voltage source rail being coupled to the solid state switch means of the relay network, the reference voltage at the inverting input being less than the voltage at the non-inverting input when the impedance networks are coupled to the respective power source lines with the phases in sequence and with all the phases energized and with the phases above a preselected minimum voltage level thereby keeping the comparator output transistor off and allowing current to flow from the control voltage source rail to the solid state switch means to excite the solid state switch means and energize the relay coil, the voltage at the inverting input being greater than the voltage at the non-inverting input when the impedance networks are coupled to the respective power source lines with the phases out of sequence thereby turning the transistor output on and shunting current away from the solid state switch means to thereby deenergize the solid state switch means and the relay coil.

2. Phase monitor and protection apparatus according to claim 1 including a current limiting resistor serially connected between the first impedance network and the wye connection.

3. Phase monitor and protection apparatus according to claim 2 including a time delay means coupled to the comparator so that when the voltage at the reference inverting input exceeds the voltage at the non-inverting input the transistor output is prevented form turning on for a selected time interval.

4. Phase monitor and protection apparatus according to claim 1 including a second comparator coupled between the transistor output and the solid state switch means to serve as a buffer and increase the switching hysteresis of the solid state switch means.

5. Phase monitor and protection circuit apparatus for use with a three phase AC power supply as a pilot duty control having a relay with contacts to be wired in series with a contactor coil comprising first, second and third unbalanced impedance networks connected in a wye configuration, each impedance network being coupled to a phase connection terminal for connection to respective power source lines, the first and third impedance networks comprising resistive networks and the second impedance network comprising a capacitive network to establish a selected voltage profile across the impedance networks,

a relay network coupled to the first impedance network comprising a diode to rectify AC current conducted through the first impedance network to provide a relay voltage source rail for the relay network, first zener diode means coupled to the rail to provide a selected voltage level for driving a relay, a relay coil and a solid state switch means serially connected with the relay coil coupled to the rail,

a control logic network coupled to the third impedance network comprising a full wave bridge rectifier to provide a control voltage source rail and common, the voltage level of the control voltage source rail being dependent upon the voltage level of the respective power source line to which the third impedance network is connected, a comparator having an inverting and a non-inverting input and an output transistor, second zener diode means coupled to the control voltage source rail to provide a fixed reference voltage, the reference voltage coupled to the inverting input, a voltage divider comprising first and second voltage divider resistors connected between the control voltage source rail and common, a junction formed between the first and second voltage divider resistors, the junction coupled to the non-inverting input, the output transistor of the comparator and the control voltage source rail being coupled to the solid state switch means of the relay network, the comparator having a power input pin and further including a third zener diode means including a second diode connected to the control voltage source rail to establish a selected comparator excitation voltage level at the anode of the second diode, the first zener diode means including a third diode connected to the relay voltage source rail to establish a selected comparator excitation level at the anode of the third diode, the cathodes of the second and third diodes connected to each other and to the power input pin of the comparator, the reference voltage at the inverting input being less than the voltage at the non-inverting input when the impedance networks are coupled to the respective power source lines with the phases in sequence and with all the phases energized and with the phases above a preselected minimum voltage level thereby keeping the comparator output transistor off and current to flow from the voltage source rail to the solid state switch means to excite the solid state switch means and energize the relay coil, the voltage at the inverting input being greater than the voltage at the non-inverting input when the impedance networks are coupled to the respective power source lines with the phases out of sequence thereby turning the transistor output on and shunting current away from the solid state switch means to thereby deenergize the solid state switch means and the relay coil.

6. Phase monitor and protection apparatus for use with a three phase AC power supply comprising first, second and third impedance networks connected in a wye configuration, each impedance network being coupled to a phase connection terminal for connection to respective power source lines, the first and third impedance networks comprising resistive networks and a second impedance network comprising a capacitive network to establish a selected voltage profile across the impedance networks,

a first circuit network coupled to the first impedance network comprising a diode to rectify the AC current conducted through the first impedance network to provide a first voltage rail, first zener diode means coupled to the first rail to provide a selected voltage level, a solid state switch means coupled to the rail,

a second circuit network serially connected to the third impedance network comprising a full wave bridge rectifier to provide a second voltage rail and common, the second voltage rail dependent upon the voltage level of the respective power source line to which the third impedance network is connected, a comparator having an inverting and a non-inverting input and an output transistor, second zener diode means coupled to the second voltage rail to provide a fixed reference voltage, the reference voltage coupled to the inverting input, a voltage divider comprising first and second voltage divider resistors connected between the second voltage rail and common, a junction formed between the first and second voltage divider resistors, the junction coupled to the non-inverting input, the output transistor of the comparator and the second voltage rail being coupled to the solid state switch means, the reference voltage at the inverting input being less than the voltage at the non-inverting input when the impedance networks are coupled to the respective power source lines with the phases in sequence and with all the phases energized and above a low limit voltage level thereby keeping the comparator output transistor off and allowing the current to flow from the second voltage rail to the solid state switch means to excite the solid state switch means, the reference voltage at the inverting input being greater than the voltage at the non-inverting input when the impedance networks are coupled to the respective power source lines with the phases out of sequence or when the voltage level of the power source falls below the low limit level for a selected period of time thereby turning the comparator output transistor on and shunting current away from the solid state switching means to thereby turning off the solid state switch means.

7. Phase monitor and protection apparatus according to claim 6 including a current limiting resistor serially connected between the first impedance network and the wye connection.

8. Phase monitor and protection apparatus according to claim 6 including time delay means coupled to the comparator so that when the voltage at the inverting input exceeds the voltage at the non-inverting input the transistor output is prevented from turning on for a selected time interval.

9. Phase monitor and protection apparatus according to claim 6 including a second comparator coupled between the transistor output and the solid state switch to serve as a buffer and a increase the switching hysteresis of the solid state switch.

10. Phase monitor and protection apparatus for use with a three phase AC power supply comprising first, second and third impedance networks connected in a wye configuration, each impedance network being coupled to a phase connection terminal for connection to respective power source lines, the first and third impedance networks comprising resistive networks and a second impedance network comprising a capacitive network to establish a selected voltage profile across the impedance networks,

a first circuit coupled to the first impedance network comprising a diode to rectify the AC current conducted through the first impedance network to provide a first voltage rail, first zener diode means coupled to the first rail to provide a selected voltage level, a solid state switch means coupled to the rail,

a second circuit network coupled to the third impedance network comprising a full wave bridge rectifier to provide a second voltage rail and common, the second voltage rail dependent upon the voltage level of the respective power source line to which the third impedance network is connected, a comparator having an inverting and a non-inverting input and an output transistor, second zener diode means coupled to the second voltage rail to provide a fixed reference voltage, the reference voltage coupled to the inverting input, a voltage divider comprising first and second voltage divider resistors connected between the second voltage rail and common, a junction formed between the first and second voltage divider resistors, the junction coupled to the non-inverting input, the output transistor of the comparator and the second voltage rail being coupled to the solid state switch means, the comparator having a power input pin and further including a third zener diode means including a second diode connected to the second voltage rail to establish a selected comparator excitation voltage level at the anode of the second diode, the first zener diode means including a third diode connected to the first voltage rail to establish a selected comparator excitation level at the anode of the third diode, the cathodes of the second and third diodes connected to each other and to the power input pin of the comparator, the reference voltage at the inverting input being less than the voltage at the non-inverting input when the impedance networks are coupled to the respective power source lines with the phases in sequence and with all the phases energized and above a low limit voltage level thereby keeping the comparator output transistor off and allowing the current to flow from the second voltage rail to the solid state switch means to excite the solid state switch means, the reference voltage at the inverting input being greater than the voltage at the non-inverting input when the impedance networks are coupled to the respective power source lines with the phases out of sequence or when the voltage level of the power source falls below the low limit level for a selected period of time thereby turning the comparator output transistor on and shunting current away from the solid state switching means to thereby turn off the solid state switch means.

11. Phase monitor protection apparatus for controlling the state of energization of a load through a multiphase power source having first, second and third phases comprising first, second and third impedance networks each having a first end connected to a phase connection terminal and a second end connected to each other at a neutral, the first and third impedance networks comprising resistive networks and the second impedance network comprising a capacitive network to establish a selected voltage profile across the impedance networks, a relay network coupled to the first impedance network between the first impedance network and neutral, the relay network having a first voltage rail and a solid state switch with a control electrode to control the state of excitation of the relay, and a control network having a second voltage rail and a comparator responsive to the voltage level across the impedance networks coupled to the third impedance network, the comparator having a power input pin and further including zener diode means including a diode connected to the second voltage rail to establish a selected comparator excitation voltage level at the anode of the diode, another zener diode means including another diode connected to the first voltage rail to establish a selected comparator excitation level at the anode of the said another diode, the cathodes of the said diode and said another diode connected to each other and to the power input pin of the comparator, the control network interconnected with the control electrode so that a change in the voltage profile caused by reversal of the connection of any two phases to the load will change the excitation state of the solid state switch and the relay.

12. Phase monitor and protection circuit apparatus according to claim 11 including a circuit limiting resistor serially connected between the first impedance network and neutral.