High bandwidth communications system having multiple serial links
First Claim
1. A data communications system, comprising:
- first circuit means for dividing an input data signal into a plurality of phases;
a plurality of second circuit means for multiplexing a plurality of bytes from each phase;
a plurality of parallel to serial converting circuits, one of said parallel to serial converting circuits associated with each of said phases, for converting each parallel byte to serial form for transmission on one of a plurality of serial transmission media;
a plurality of serial transmission media;
a plurality of serial to parallel converter circuits, each connected to one of said plurality of said serial transmission media for converting the serial data streams to parallel form;
a plurality of byte synchronization circuits for placing a plurality of bytes for each phase in correct order; and
a word synchronization circuit having inputs connected to each of said byte synchronization circuits for assembling said plurality of bytes for each phase into a word and for transmitting each said word to a parallel data bus in synchronized order.
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Abstract
A data communication system includes a phase splitting circuit to split a high speed parallel data word into a number of individual parallel data bytes, a byte multiplexor for each of the phases of a phase splitting circuit, encoding and serialization circuits for converting each byte such as an 8-bit byte to an encoded form suitable for serial transmission such as by employing the Widmer et al. 8-bit/10-bit code, transmitting each encoded byte across one of a number of serial transmission links to a receiving device where the data is deserialized and decoded to recover the original byte which is then synchronized by a byte synchronization circuit. The byte synchronization circuits are then coupled to a word synchronization circuit where the original high bandwidth data word is recovered and transmitted on an internal high speed parallel bus within the receiving device.
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Citations
8 Claims
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1. A data communications system, comprising:
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first circuit means for dividing an input data signal into a plurality of phases; a plurality of second circuit means for multiplexing a plurality of bytes from each phase; a plurality of parallel to serial converting circuits, one of said parallel to serial converting circuits associated with each of said phases, for converting each parallel byte to serial form for transmission on one of a plurality of serial transmission media; a plurality of serial transmission media; a plurality of serial to parallel converter circuits, each connected to one of said plurality of said serial transmission media for converting the serial data streams to parallel form; a plurality of byte synchronization circuits for placing a plurality of bytes for each phase in correct order; and a word synchronization circuit having inputs connected to each of said byte synchronization circuits for assembling said plurality of bytes for each phase into a word and for transmitting each said word to a parallel data bus in synchronized order. - View Dependent Claims (2, 3)
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4. A method of transmitting data at an improved bandwidth in a data communication system, comprising the steps of:
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dividing an input data signal into a plurality of phases; multiplexing a plurality of bytes from each phase; converting each byte to serial form for transmission on one of a plurality of serial transmission media; converting the serial form of each byte to parallel form; placing a plurality of bytes for each phase in correct order; assembling the plurality of bytes for each phase into a word; and transmitting each word to a parallel data bus in synchronized order. - View Dependent Claims (5, 6)
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7. A data transmission system, comprising:
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first circuit means for dividing an input data signal into a plurality of phases; a plurality of second circuit means for multiplexing a plurality of bytes from each phase; and a plurality of parallel to serial converting circuits, one of said parallel to serial converting circuits associated with each of said phases, for converting each parallel byte to serial form for transmission. - View Dependent Claims (8)
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Specification