Control circuit with a level shifter for switching an electronic switch

• US 5,572,156 A
• Filed: 09/18/1995
• Issued: 11/05/1996
• Est. Priority Date: 09/16/1994
• Status: Expired due to Term

• Current Assignee: SGS-Thomson Microelectronics, S.R.L. (STMicroelectronics NV)
• Original Assignee: SGS-Thomson Microelectronics, S.R.L. (STMicroelectronics NV)
• Inventors: Diazzi, Claudio, Tarantola, Mario, Martignoni, Fabrizio
• Primary Examiner(s): TRAN, TOAN V
• Application Number:
  US08/529,883
• Time in Patent Office: 414 Days
• Field of Search: 327/199-201, 327/215-222, 327/310, 327/312, 327/379, 327/382, 327/384, 327/387-389, 327/427, 327/430-437, 327/327, 327/328, 327/108-112, 326/21, 326/26, 326/27, 326/82-87
• US Class Current: 327/109
• CPC Class Codes: H03K 17/063 in field-effect transistor switches
• CPC Class Codes: H03K 17/161 in field-effect transistor switches
• CPC Class Codes: H03K 17/687 the devices being field-effect transistors
• CPC Class Codes: H03K 3/356113 using additional transistors in the input circuit

Abstract

A control circuit for a power transistor, connected between two supply terminals in series with a load. The control circuit comprises a control logic circuit which produces a signal at two levels with respect to a reference terminal, a level shifter connected between the control circuit and the power transistor, which produces a signal at two levels relative to the node between the power transistor and the load. The level shifter comprises a flip-flop the output of which controls the power transistor, and an electronic switch, for example a MOSFET transistor, connected between the "set" input of the flip-flop and the node and controlled by the "reset" input of the flip-flop in such a way as to be closed when the "reset" input is greater, by a predetermined value, than that of the node. The electronic switch prevents the parasitic current flowing through the set and reset inputs from erroneously switching the power transistor.

Claims

1. An integrated control circuit for switching an electronic power switch, comprising:

a control logic circuit for producing first and second voltage levels; and

a level shifter having an input connected to the control logic circuit and an output connected to the electronic power switch, the level shifter including

a bistable stage having first and second inputs, and an output defining the output of the level shifter; and

a switch having an input connected to the second input, the switch being connected between the first input and a connection node, wherein the switch turns on when the voltage level at the second input is greater than the voltage level at the connection node.

2. The circuit according to claim 1 wherein the switch includes an N channel MOS transistor.

3. The circuit according to claim 1 wherein the bistable stage includes a flip-flop.

4. The circuit according to claim 3 wherein the flip-flop is of a dominant reset type having set and reset inputs and wherein the set input corresponds to the first input and the reset input corresponds to the second input.

5. The circuit according to claim 1 wherein the level shifter further includes:

a first circuit branch having an output connected to the first input, and including a first transistor and a first resistor connected between the first transistor and the connection node; and

a second circuit branch having an output connected to the second input, and including a second transistor and a second resistor connected between the second transistor and the connection node, the first and second transistors being switched alternately based on the first and second voltage levels produced by the control logic circuit.

6. The circuit according to claim 5 wherein the first and second transistors are cross coupled to each other.

7. The circuit according to claim 6 wherein the first circuit branch further includes:

a third transistor connected to the first transistor and controlled by the control logic circuit;

a third resistor connected to the first transistor; and

a first diode connected in parallel with the third resistor; and

wherein the second circuit branch further includes;

a fourth transistor connected to the second transistor and controlled by the control logic circuit;

a fourth resistor connected to the second transistor; and

a second diode connected in parallel with the fourth resistor, the third transistor and the fourth transistor receiving complementary signals from each other.

8. An integrated control circuit for switching an electronic power switch, comprising:

a control logic circuit for producing first and second voltage levels; and

a level shifter having an input connected to the control logic circuit and an output connected to the electronic power switch, the level shifter including

a bistable stage having first and second inputs, and an output defining the output of the level shifter;

a first circuit branch having an output connected to the first input, and including a first transistor and a first resistor connected between the first transistor and a connection node;

a second circuit branch having an output connected to the second input, and including a second transistor and a second resistor connected between the second transistor and the connection node, the first and second transistors being switched alternately based on the first and second voltage levels produced by the control logic circuit; and

means for maintaining the first input at substantially the same voltage level as the voltage level at the connection node during the switching of the electronic power switch.

9. The circuit according to claim 8 wherein the means for maintaining includes a switch having an input connected to the second input, the switch being connected between the first input and the connection node, wherein the switch turns on when the voltage level at the second input is greater than the voltage level at the connection node.

10. The circuit according to claim 9 wherein the switch includes an N channel MOS transistor.

11. A switching control circuit for an electronic power switch connected in series with a load between first and second supply terminals comprising

a control logic circuit adapted to produce an output signal having two voltage levels referred to the voltage level of a reference terminal,

a level shift circuit the input of which is connected to the output of the control logic circuit and an output of which is connected to the control terminal of the electronic switch, and adapted to produce at its output a signal having two voltage levels, corresponding to the signal from the control logic circuit, relative to the voltage level of the connection node between the electronic switch and the load,

this level shift circuit comprising

a bistable stage having two inputs and one output, which is the output of the level shift circuit, and

a supplementary electronic switch connected between one of the two inputs of the bistable stage and said connection node and having a control terminal connected to the other of the two inputs of the bistable stage, in such a way as to be closed when the other of the two inputs of the bistable stage is at a voltage level greater than that of the connection node.

12. A circuit according to claim 11, in which the bistable stage is of the "dominant reset" type.

13. A circuit according to claim 11, in which the level shift circuit comprises two substantially identical circuit branches each including an n channel MOSFET transistor having its source terminal connected to the first supply terminal, its drain terminal connected to a third supply terminal via the parallel connection of a resistor and a diode and its gate terminal connected to one output of the logic circuit, in such a way that the control signals applied to the gate terminals are complementary to one another, the drain terminals being coupled each to an input terminal of the said bistable stage.

14. A circuit according to claim 13, in which the coupling between the drain terminals of the MOSFET transistors and the input terminals of the bistable stage is achieved by means of two p channel MOSFET transistors each having a source terminal connected to the drain terminal of a respective n channel MOSFET transistor, a drain terminal connected to the connection node via a resistor, and a gate terminal connected to the drain terminal of the other n channel MOSFET transistor, the drain terminals of the two p channel MOSFET transistors being connected to the input terminals of the bistable stage.

15. A circuit according to claim 11, in which the electronic switch is an n channel MOSFET transistor the gate terminal of which is the control terminal of the switch itself.