I/Q quadraphase modulator circuit

• US 5,574,755 A
• Filed: 01/25/1994
• Issued: 11/12/1996
• Est. Priority Date: 01/25/1994
• Status: Expired due to Fees

• Current Assignee: Philips Electronics North America Corporation (Koninklijke Philips N.V.)
• Original Assignee: Philips Electronics North America Corporation (Koninklijke Philips N.V.)
• Inventors: Persico, Charles J.
• Primary Examiner(s): Coles, Sr., Edward L.
• Assistant Examiner(s): Williams, Kimberly A.
• Application Number:
  US08/186,398
• Time in Patent Office: 1,022 Days
• Field of Search: 375/261, 375/298, 375/295, 332/103, 332/104, 332/105
• US Class Current: 375/295
• CPC Class Codes: H03C 1/545 using bipolar transistors
• CPC Class Codes: H03C 2200/0025 Gilbert multipliers
• CPC Class Codes: H03C 2200/0058 Quadrature arrangements
• CPC Class Codes: H03C 2200/0066 Reduction of carrier leakage or the suppression of the carrier
• CPC Class Codes: H03D 1/229 using at least a two emittor-coupled differential pair of transistors H03D1/2209 - H03D1/2281 take precedence
• CPC Class Codes: H03D 7/1433 using bipolar transistors H03D7/145 takes precedence
• CPC Class Codes: H03D 7/1458 Double balanced arrangements, i.e. where both input signals are differential
• CPC Class Codes: H03D 7/165 at least two frequency changers being located in different paths, e.g. in two paths with carriers in quadrature combined with amplitude demodulation H03D1/2245, combined with angle demodulation H03D3/007; N-path filters H03H19/002
• CPC Class Codes: H03D 7/18 Modifications of frequency-changers for eliminating image frequencies H03D7/16 takes precedence

Abstract

An I/Q quadraphase modulator circuit for correcting phase errors of, typically, LO input quadrature signals. The circuit uses a pair of Gilbert cell multipliers, to the bottom ports of which are applied I and Q signals, and to the top ports of which are applied sum and difference, limited, quadrature, differential signals. The result is to make the circuit less sensitive to LO phase errors and thus to improve sideband (image) rejection over the conventional circuit typically using one Gilbert cell multiplier.

Claims

1. An I/Q quadraphase modulator comprising:

(a) first and second multiplier means each having first, second, and third inputs and an output,

(b) means for connecting an I input signal to the third input of the first multiplier means,

(c) means for connecting a Q input signal to the third input of the second multiplier means,

(d) four quadraphase signals V1, V2, V3, V4 having a frequency equal to ω

₁, where;

space="preserve" listing-type="equation">V1=sinω

.sub.1 t+cosω

.sub.1 t,

space="preserve" listing-type="equation">V2=cosω

.sub.1 t+sinω

.sub.1 t,

space="preserve" listing-type="equation">V3=sinω

.sub.1 t-cosω

.sub.1 t,

space="preserve" listing-type="equation">V4=sinω

.sub.1 t-cosω

.sub.1 t,

(e) means for supplying the signal V1 to the first input of the first multiplier means,

(f) means for supplying the signal V2 to the second input of the first multiplier means,

(g) means for supplying the signal V3 to the first input of the second multiplier means,

(h) means for supplying the signal V4 to the second input of the second multiplier means.

2. The I/Q quadraphase modulator as claimed in claim 1, wherein the first and second multiplier means is a Gilbert cell multiplier.

3. The I/Q quadraphase modulator as claimed in claim 2, wherein each Gilbert cell multiplier comprises first and second differential pairs series-connected to a third differential pair, said first, second and third inputs being connected, respectively, to the first, second, and third differential pairs.

4. An I/Q quadraphase modulator comprising:

(a) first and second multiplier means each having first, second, and third inputs and an output,

(b) summation means having inputs connected to the outputs of the first multiplier means and second multiplier means and having an output,

(c) means for connecting an I input signal to the third input of the first multiplier means,

(d) means for connecting a Q input signal to the third input of the second multiplier means,

(e) means for receiving and processing a local oscillator signal having a frequency equal to ω

₁, to produce four quadraphase signals, V1, V2, V3, V4, where;

space="preserve" listing-type="equation">V1=sinω

.sub.1 t+cosω

.sub.1 t,

space="preserve" listing-type="equation">V2=cosω

.sub.1 t+sinω

.sub.1 t,

space="preserve" listing-type="equation">V3=sinω

.sub.1 t-cosω

.sub.1 t,

space="preserve" listing-type="equation">V4=sinω

.sub.1 t-cosω

.sub.1 t,

(f) means for supplying the signal V1 to the first input of the first multiplier means,

(g) means for supplying the signal V2 to the second input of the first multiplier means,

(h) means for supplying the signal V3 to the first input of the second multiplier means,

(i) means for supplying the signal V4 to the second input of the second multiplier means.

5. The I/Q quadraphase modulator as claimed in claim 4, wherein the means for receiving and processing includes means for limiting the amplitude of the local oscillator signals.

6. The I/Q quadraphase modulator as claimed in claim 5, wherein the first and second multiplier means is a Gilbert cell multiplier.

7. The I/Q quadraphase modulator as claimed in claim 6, wherein each Gilbert cell multiplier comprises first and second differential pairs series-connected to a third differential pair, said first, second and third inputs being connected, respectively, to the first, second, and third differential pairs.

8. The I/Q quadraphase modulator as claimed in claim 4, wherein the means for receiving and processing a local oscillator signal comprises a 90°

phase shifter having an input coupled to said local oscillator signal and four outputs for producing said four quadraphase signals.