Trenched DMOS transistor having thick field oxide in termination region

• US 5,578,851 A
• Filed: 03/29/1996
• Issued: 11/26/1996
• Est. Priority Date: 08/15/1994
• Status: Expired due to Term

• Current Assignee: Siliconix Incorporated (Vishay Intertechnology Incorporated)
• Original Assignee: Siliconix Incorporated (Vishay Intertechnology Incorporated)
• Inventors: Hshieh, Fwu-Iuan, Ho, Yueh-Se, Owyang, King, Chang, Mike F.
• Primary Examiner(s): Ngo, Ngan V.
• Application Number:
  US08/625,639
• Time in Patent Office: 242 Days
• Field of Search: 257/329, 257/330, 257/331, 257/332, 257/333, 257/334
• US Class Current: 257/330
• CPC Class Codes: H01L 29/404 Multiple field plate structures
• CPC Class Codes: H01L 29/407 Recessed field plates, e.g. trench field plates, buried field plates
• CPC Class Codes: H01L 29/7811 with an edge termination structure guard regions per se H01L29/0619; field plates per se H01L29/402
• CPC Class Codes: H01L 29/7813 with trench gate electrode, e.g. UMOS transistors trench gate electrodes per se H01L29/4236

Abstract

A trenched DMOS transistor is fabricated using seven masking steps. One masking step defines both the P+ deep body regions and the active portions of the transistor which are masked using a LOCOS process. A second masking step defines the insulating oxide in the termination region. The insulating (oxide) layer in the termination region is thus thicker than in the active region of the transistor, thereby improving process control and reducing substrate contamination during processing. Additionally, the thicker field oxide in the termination region improves electric field distribution so that avalanche breakdown occurs in the cell (active) region rather than in the termination region, and thus breakdown voltage behavior is more stable and predictable.

Claims

1. A field effect transistor comprising:

a semiconductor substrate having a first conductivity type and having a principal surface;

an active region of the transistor comprising;

(a) a plurality of spaced-apart doped semiconductor regions of a second conductivity type extending from the principal surface into the substrate, being deep body regions of the transistor;

(b) a plurality of trenches extending into the substrate from the principal surface and being filled with a conductive material; and

(c) doped regions of the first and second conductivity type extending into the substrate from the principal surface adjacent at least some of the trenches, being respectively source and body regions of the transistor; and

a termination region of the transistor comprising;

a field oxide layer formed on portions of the principal surface, including on a portion of the principal surface extending to an outer edge of the termination region and beyond an outer edge of an underlying doped region.

2. The transistor of claim 1, further comprising a conductive layer overlying the field oxide layer in the termination region and being in electrical contact with at least one doped semiconductor region of the second conductivity type which extends into the substrate in the termination region.

3. The transistor of claim 1, wherein the field oxide layer is at least 5000 Å

thick.

4. The transistor of claim 2, wherein the conductive layer is a field plate, and wherein the at least one doped semiconductor region in the termination region is a guard ring, and further comprising a guard ring conductive contact overlying and in contact with the guard ring and also contacting the field plate.

5. The transistor of claim 4, wherein the field oxide layer extends from the outer edge of the termination region laterally inward to the guard ring contact.