Display control device for controlling first and second displays of different types

• US 5,579,025 A
• Filed: 04/13/1994
• Issued: 11/26/1996
• Est. Priority Date: 10/31/1990
• Status: Expired due to Term

• Current Assignee: Yamaha Corporation
• Original Assignee: Yamaha Corporation
• Inventors: Itoh, Shuhei
• Primary Examiner(s): Hjerpe, Richard
• Assistant Examiner(s): NGUYEN, CHANH DUY
• Application Number:
  US08/227,182
• Time in Patent Office: 958 Days
• Field of Search: 340/716, 340/717, 340/814, 340/784, 340/720, 340/811, 358/148, 345/1, 345/2, 345/3, 345/213
• US Class Current: 345/3.2
• CPC Class Codes: G06F 3/1475 with conversion of CRT control signals to flat panel control signals, e.g. adapting the palette memory
• CPC Class Codes: G09G 2360/02 Graphics controller able to handle multiple formats, e.g. input or output formats

Abstract

A display control device performs, in accordance with an application program prepared for a first display, a display control for a second display which has a different display timing from the first display. The device includes a clock generation circuit for generating a basic clock for driving the second display, a first controller and a second controller. The first controller includes a first timing control register capable of rewriting in accordance with the application program. The second controller includes a second timing control register for setting a display timing of the second display and generating a synchronizing signal for the second display on the basis of contents of the second timing control register and the basic clock. The first controller is operated by the basic clock and generates a timing signal for the second display on the basis of the synchronizing signal for the second display and the contents of the first timing control register. Even in a case where contents of the first timing control register have been rewritten by the application program, the first controller generates various timing signals based on the basic clock and the synchronizing signal for the second display and, therefore, it does not affect the display operation of the second display.

Claims

1. A display control device performing, in accordance with an application program prepared for a first display, a display control for a second display, the display control device comprising:

clock generation means for generating a basic clock for driving the second display;

a first controller including a first timing control register for rewriting contents thereof in accordance with the application program in response to a change in a display mode of the display control device, the first controller generating a timing control signal and outputting display data for the first display; and

a second controller including a second timing control register for setting a display timing of the second display, and the second controller producing and outputting a synchronizing signal for the second display on the basis of contents of the second timing control register and the basic clock;

wherein the synchronizing signal is provided to the first controller from the second controller; and

wherein said first controller is operated by the basic clock and generates a timing signal for the second display on the basis of the synchronizing signal for the second display outputted from the second controller and the contents of the first timing control register such that the display data for the first display is outputted to the second controller from the first controller and a timing of the first controller is synchronized with the synchronizing signal from the second controller, said second controller converting the display data outputted from the first controller while outputting the converted display data to the second display.

2. A display control device in accordance with claim 1, further comprising:

display selecting means for selecting between the first and second displays; and

second display timing signal generating means for generating a second display signal in accordance with a selection of the second display by said display selecting means.

3. A display control device in accordance with claim 1, wherein said first controller includes a vertical synchronizing circuit for generating a vertical timing signal for the second display and a horizontal synchronizing circuit for generating a horizontal timing signal for the second display.

4. A display control device in accordance with claim 1, wherein said first display is a CRT display and said second display is a flat panel display.

5. A display control device in accordance with claim 1, wherein the synchronization of the first controller and the conversion of the display data for the first display is performed free of a dual port memory.

6. A display control apparatus for a first type of display and a second type of display, the display control apparatus comprising:

clock generation means for generating a display clock signal;

first controlling means for generating first timing signals for the first type of display based on the display clock signal and first timing control data, said first controlling means including a first register for storing the first timing control data, the first controlling means rewriting the first timing control data in response to a change in a display mode of the display control apparatus and outputting display data for the first type of display;

said first controlling means also including timing control means for generating a timing signal based on the first timing control data and the display clock signal; and

second controlling means for generating second timing signals for the second type of display based on the display clock signal and second timing control data, and for generating a synchronizing signal, the synchronizing signal being provided to the first controlling means from the second controlling means to synchronize the first controller with the second timing signals for the second type of display, the second controlling means including a second register for storing the second timing control data;

wherein the first controlling means outputs the display data for the first type of display to the second controlling means from the first controlling means and a timing of the first controlling means is synchronized with the synchronizing signal from the second controlling means; and

wherein the second controlling means converts the display data outputted from the first controlling means while outputting the convened display data to the second type of display.

7. A display control apparatus in accordance with claim 6, wherein the synchronization of the first controlling means and the conversion of the display data for the first type of display is performed free of a dual port memory.

8. A display control device performing, in accordance with an application program prepared for a first display, a display control for a second display, the display control device comprising:

clock generation means for generating first and second display clock signals for driving the first and second displays;

a first display controller including a first timing control register storing first display timing signal data and rewriting the first display timing signal data in accordance with the application program in response to a change in a display mode of the display control device, the first display controller outputting display data for the first display;

display selecting means for selecting one of the first and second displays;

clock selecting means, included in the first display controller, for selecting one of the first and second display clocks in response to the display selecting means; and

a second display controller including a second timing control register storing second display timing data for generating a synchronizing signal for the second display which is outputted to the first display controller;

wherein the synchronizing signal is generated on the basis of the second display timing signal data in the second timing control register and the selected second display clock selected by the selecting means;

wherein the second display controller is for setting a display timing of the second display based on a display timing signal outputted from the first display controller from the second display controller;

wherein said first display controller outputs said display timing signal of the second display to the second display controller on the basis of the selected second display clock, the synchronizing signal for the second display, and the first display timing signal data stored in the first timing control register when the second display is selected;

wherein the first display controller outputs display data for the first display to the second display controller from the first display controller and a timing of the first display controller is synchronized with the synchronizing signal from the second display controller; and

wherein the second display controller converts the display data outputted from the first display controller while outputting the converted display data to the second display.

9. A display control device in accordance with claim 8, wherein the synchronization of the first display controller and the conversion of the display data for the first display is performed free of a dual port memory.

10. A display control apparatus for a first type of display and a second type of display, wherein the display is controlled in accordance with a program prepared for the first display, the display control apparatus comprising:

a clock generation circuit that generates at least one basic clock signal for driving the second display;

a first controller circuit having a first timing control memory that contains first display control data which is rewritten in accordance with the application program in response to a change in a display mode of the display control device, the first controller circuit generating a timing control signal and outputting display data for the first display; and

a second controller circuit having a second timing control memory that contains second display control data for setting a display timing of the second display, and the second controller circuit produces and outputs a synchronizing signal for the second display on the basis of second timing control data of the second timing control memory and the at least one basic clock;

wherein the synchronizing signal is provided to the first controller circuit from the second controller circuit; and

wherein the first controller circuit is operated by the at least one basic clock and generates a timing signal for the second display on the basis of the synchronizing signal for the second display outputted from the second controller circuit and the contents of the first timing control memory such that the display data for the first display is outputted to the second controller circuit from the first controller circuit and a timing of the first controller is synchronized with the synchronizing signal from the second controller circuit, and the second controller circuit converts the display data outputted from the first controller upon receipt while outputting the converted display data to the second display.

11. A display control apparatus in accordance with claim 10, further comprising:

a display selecting circuit that selects between the first and second displays; and

a second display timing signal generating circuit that generates a second display signal in accordance with a selection of the second display by said display selecting circuit.

12. A display control apparatus in accordance with claim 10, wherein the first controller circuit includes a vertical synchronizing circuit for generating a vertical timing signal for the second display and a horizontal synchronizing circuit for generating a horizontal timing signal for the second display.

13. A display control apparatus in accordance with claim 10, wherein the first display is a CRT display and the second display is a flat panel display.

14. A display control apparatus in accordance with claim 10, wherein the synchronization of the first controller circuit and the conversion of the display data for the first display is performed free of a dual port memory.

18. A display control apparatus in accordance with claim 12, wherein the first display is a CRT display and the second display is a flat panel display.

15. A display control apparatus for a first type of display and a second type of display, wherein the display is controlled in accordance with a program prepared for the first display, the display control apparatus comprising:

a first controller circuit having a first timing control memory that contains first display control data which is rewritten in accordance with the program in response to a change in a display mode of the display control device, the first controller circuit generating a timing control signal and outputting display data for the first display; and

a second controller circuit having a second timing control memory that contains second display control data for setting a display timing of the second display, and the second controller circuit produces and outputs a synchronizing signal for the second display on the basis of second timing control data of the second timing control memory;

wherein the synchronizing signal is provided to the first controller circuit from the second controller circuit; and

wherein the first controller circuit generates a timing signal for the second display on the basis of the synchronizing signal for the second display outputted from the second controller circuit and the contents of the first timing control memory such that the display data for the first display is outputted to the second controller circuit from the first controller circuit and a timing of the first controller circuit is synchronized with the synchronizing signal from the second controller circuit, and the second controller circuit converts the display data outputted from the first controller upon receipt while outputting the converted display data to the second display.

16. A display control apparatus in accordance with claim 15, further comprising:

a display selecting circuit that selects between the first and second displays; and

a second display timing signal generating circuit that generates a second display signal in accordance with a selection of the second display by said display selecting circuit.

17. A display control apparatus in accordance with claim 15, wherein the first controller circuit includes a vertical synchronizing circuit for generating a vertical timing signal for the second display and a horizontal synchronizing circuit for generating a horizontal timing signal for the second display.

19. A display control apparatus in accordance with claim 15, wherein the synchronization of the first controller circuit and the conversion of the display data for the first display is performed free of a dual port memory.

20. A display control apparatus for a first type of display and a second type of display, wherein the display is controlled in accordance with a program prepared for the first display, the display control apparatus comprising:

a clock generation circuit that generates at least one basic clock signal for driving the second display;

a first controller circuit having a first timing control memory that contains first display control data which is be rewritten in accordance with the application program in response to a change in a display mode of the display control device, the first controller circuit generating a timing control signal and outputting display data for the first display; and

a second controller circuit having a second timing control memory that contains second display control data for setting a display timing of the second display, and the second controller circuit produces and outputs a synchronizing signal for the second display on the basis of second timing control data of the second timing control memory and the at least one basic clock;

wherein the synchronizing signal is provided to the first controller circuit and controls the first controller from the second controller circuit to control and adjust a timing of the first controller circuit; and

wherein the first controller circuit is operated by the at least one basic clock and generates a timing signal for the second display on the basis of the synchronizing signal for the second display outputted from the second controller circuit and the contents of the first timing control memory such that the display data for the first display is outputted to the second controller circuit from the first controller circuit and the timing of the first controller circuit is adjusted and synchronized with the synchronizing signal from the second controller circuit, and the second controller circuit converts the display data outputted from the first controller upon receipt while outputting the converted display data to the second display;

wherein the synchronization of the first controller and the conversion of the display data for the first display is performed free of a dual port memory.

21. A display control apparatus for a first type of display and a second type of display, wherein the display is controlled in accordance with a program prepared for the first display, the display control apparatus comprising:

a first controller circuit having a first timing control memory that contains first display control data which is rewritten in accordance with the program in response to a change in a display mode of the display control device, the first controller circuit generating a timing control signal and outputting display data for the first display; and

a second controller circuit having a second timing control memory that contains second display control data for setting a display timing of the second display, and the second controller circuit produces and outputs a synchronizing signal for the second display on the basis of second timing control data of the second timing control memory;

wherein the synchronizing signal is provided to the first controller circuit from the second controller circuit to control and adjust a timing of the first controller circuit; and

wherein the first controller circuit generates a timing signal for the second display on the basis of the synchronizing signal for the second display outputted from the second controller circuit and the contents of the first timing control memory such that the display data for the first display is outputted to the second controller circuit from the first controller circuit and the timing of the first controller circuit is adjusted and synchronized with the synchronizing signal from the second controller circuit, and the second controller circuit converts the display data outputted from the first controller upon receipt while outputting the converted display data to the second display;

wherein the synchronization of the first controller and the conversion of the display data for the first display is performed free of a dual port memory.