Picture processing system
First Claim
1. A motion picture decoder for processing compressed data arriving in packets corresponding to picture blocks, said packets being separated by headers having decoding parameters of the packets, said system including:
- a first plurality of processing elements using said decoding parameters in processing data in the packets;
a memory bus connected to a picture memory and the first plurality of processing elements;
a memory controller connected to the memory bus to exchange data between the picture memory and the first plurality of processing elements at rates adapted to the processing rates of said elements;
a variable length decoder, connected to the memory bus to receive the compressed data, that extracts packets and decoding parameters from the compressed data;
a pipeline circuit having a second plurality of processing elements connected to process packets in pipelined fashion; and
a parameter bus connected to the variable length decoder and the pipeline circuit to provide packets and decoding parameters to the pipeline circuit to be processed, and to provide decoding parameters to the first plurality of processing elements of the system;
wherein the pipeline circuit includes;
a run-level decoder connected to the parameter bus to receive the packets;
an inverse quantizer circuit directly receiving processed packets output by the variable length decoder, and connected to the parameter bus to receive quantizer scale coefficients among the decoding parameters; and
an inverse cosine transform circuit directly receiving processed packets output by the inverse quantizer circuit and coupled to the memory bus to store decoded blocks in the picture memory.
1 Assignment
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Accused Products
Abstract
A system that processes compressed data arriving in packets corresponding to picture blocks, the packets being separated by headers containing decoding parameters of the packets. A memory bus is controlled by a memory controller to exchange data between the processing elements and a picture memory. A pipeline circuit contains a plurality of processing elements. A parameter bus provides packets to be processed to the pipeline circuit, as well as the decoding parameters to elements of the system. The parameter bus is controlled by a variable length decoder that receives the compressed data from the memory bus and that extracts the packets and the decoding parameters therefrom.
107 Citations
13 Claims
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1. A motion picture decoder for processing compressed data arriving in packets corresponding to picture blocks, said packets being separated by headers having decoding parameters of the packets, said system including:
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a first plurality of processing elements using said decoding parameters in processing data in the packets; a memory bus connected to a picture memory and the first plurality of processing elements; a memory controller connected to the memory bus to exchange data between the picture memory and the first plurality of processing elements at rates adapted to the processing rates of said elements; a variable length decoder, connected to the memory bus to receive the compressed data, that extracts packets and decoding parameters from the compressed data; a pipeline circuit having a second plurality of processing elements connected to process packets in pipelined fashion; and a parameter bus connected to the variable length decoder and the pipeline circuit to provide packets and decoding parameters to the pipeline circuit to be processed, and to provide decoding parameters to the first plurality of processing elements of the system; wherein the pipeline circuit includes; a run-level decoder connected to the parameter bus to receive the packets; an inverse quantizer circuit directly receiving processed packets output by the variable length decoder, and connected to the parameter bus to receive quantizer scale coefficients among the decoding parameters; and an inverse cosine transform circuit directly receiving processed packets output by the inverse quantizer circuit and coupled to the memory bus to store decoded blocks in the picture memory. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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Specification