Process for forming field isolation and a structure over a semiconductor substrate
First Claim
1. A process for forming field isolation comprising the steps of:
- forming a pad layer over a semiconductor substrate;
depositing an amorphous silicon layer over the pad layer;
incorporating a dopant into the amorphous silicon layer by a manner selected from a group consisting of;
in-situ doping;
furnace doping; and
ion implantation;
annealing the amorphous silicon layer to form an annealed silicon layer;
forming a silicon nitride layer over the pad layer after the step of depositing the amorphous silicon layer;
patterning the silicon nitride layer to form a patterned silicon nitride layer including an opening and a silicon nitride member, wherein the step of patterning is performed after the step of incorporating;
thermally oxidizing the substrate underlying the opening to form a field isolation region within the opening and adjacent to the annealed silicon layer; and
removing the silicon nitride member.
18 Assignments
0 Petitions
Accused Products
Abstract
An annealed amorphous silicon layer is formed prior to forming field isolation regions when using in a LOCOS field isolation process. The annealed amorphous silicon layer helps to reduce encroachment compared to conventional LOCOS field isolation process and helps to reduce the likelihood of forming pits within a substrate compared to a PBL field isolation process. The annealed amorphous silicon layer may be used in forming field isolation regions that defines the active regions between transistors including MOSFETs and bipolar transistors. Doped silicon or a silicon-rich silicon nitride layer may be used in place of conventional materials. The anneal of the amorphous silicon layer may be performed after forming a silicon nitride layer if the silicon nitride layer is deposited at a temperature no higher than 600 degrees Celsius.
-
Citations
29 Claims
-
1. A process for forming field isolation comprising the steps of:
-
forming a pad layer over a semiconductor substrate; depositing an amorphous silicon layer over the pad layer; incorporating a dopant into the amorphous silicon layer by a manner selected from a group consisting of; in-situ doping; furnace doping; and ion implantation; annealing the amorphous silicon layer to form an annealed silicon layer; forming a silicon nitride layer over the pad layer after the step of depositing the amorphous silicon layer; patterning the silicon nitride layer to form a patterned silicon nitride layer including an opening and a silicon nitride member, wherein the step of patterning is performed after the step of incorporating; thermally oxidizing the substrate underlying the opening to form a field isolation region within the opening and adjacent to the annealed silicon layer; and removing the silicon nitride member. - View Dependent Claims (2, 3, 4, 5, 6)
-
-
7. A process for forming field isolation comprising the steps of:
-
forming a pad layer over a semiconductor substrate; depositing an amorphous silicon layer over the pad layer; annealing the amorphous silicon layer; forming a silicon nitride layer over the amorphous silicon layer; patterning the silicon nitride layer to form a patterned silicon nitride layer including a silicon nitride layer opening and a silicon nitride member; thermally oxidizing the substrate underlying the silicon nitride layer opening to form a field isolation region within the silicon nitride layer opening; and removing the silicon nitride member, wherein the annealing step is performed in a separate step from the step of forming the silicon nitride layer and prior to the step of thermally oxidizing the substrate. - View Dependent Claims (8, 9, 10, 11, 12, 13, 14, 15, 16, 17)
-
-
18. A process for forming field isolation comprising the steps of:
-
forming a pad layer over a semiconductor substrate; depositing an amorphous silicon layer over the pad layer; annealing the amorphous silicon layer to form an annealed silicon layer; forming a silicon nitride layer over the annealed silicon layer before performing a thermal oxidation step; patterning the silicon nitride layer to form a patterned silicon nitride layer including a silicon nitride layer opening and a silicon nitride member; thermally oxidizing the substrate underlying the silicon nitride layer opening to form a field isolation region within the silicon nitride layer opening; and removing the silicon nitride member. - View Dependent Claims (19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29)
-
Specification