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Nonvolatile SRAM cells and cell arrays

  • US 5,581,501 A
  • Filed: 08/17/1995
  • Issued: 12/03/1996
  • Est. Priority Date: 08/17/1995
  • Status: Expired due to Term
First Claim
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1. A memory cell for an integrated circuit comprising:

  • a first voltage source;

    a second voltage source, said second voltage source at a voltage level below a voltage level of said first voltage source;

    a sensing node;

    a first programmable memory element, coupled between said first voltage source and said sensing node; and

    a second programmable memory element, coupled between said sensing node and a second voltage source, wherein said second programmable memory element is substantially identical to said fist programmable memory element.

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