Symmetry control circuit and method

• US 5,583,402 A
• Filed: 01/31/1994
• Issued: 12/10/1996
• Est. Priority Date: 01/31/1994
• Status: Expired due to Term

• Current Assignee: Monolithic Power Systems Incorporated
• Original Assignee: Magnetek Incorporated (Columbus Mckinnon Corporation)
• Inventors: Marques, Antonio, Moisin, Mihail S., Hesterman, Bryce L., Nostwick, Allan A.
• Primary Examiner(s): Pascal, Robert
• Assistant Examiner(s): Philogene, Haissa
• Application Number:
  US08/190,746
• Time in Patent Office: 1,044 Days
• Field of Search: 315/307, 315/308, 315/209 R, 315/219, 315/224, 315/226, 315/244, 315/239, 315/246, 315/DIG. 4, 315/DIG. 5, 315/DIG. 7, 363/40, 363/41, 363/95, 363/97, 363/98, 363/133, 363/134, 363/24, 363/25, 363/26
• US Class Current: 315/307
• CPC Class Codes: H05B 41/2828 using control circuits for the switching elements H05B41/2827 takes precedence
• CPC Class Codes: H05B 41/3927 by pulse width modulation H05B41/3922 takes precedence
• CPC Class Codes: Y10S 315/07 Starting and control circuits for gas discharge lamp using transistors

Abstract

The present invention provides a method and circuit for controlling the flow of current through a load. In a preferred embodiment, an oscillator generates a pulse signal of constant frequency. A pulse width modulator adjusts the duty cycle of the pulse signal in response to a dimming level signal input indicative of the desired level of current flow through the load. A converter receives the pulse signal as an input and converts it into an AC signal, the frequency of which follows the frequency of the pulse signal and the symmetry of which varies with the duty cycle of the pulse signal. The load is connected into a resonant circuit tuned such that a change in the symmetry of the AC signal changes the level of current flowing through the load.

Claims

1. A circuit for controlling the flow of current through a load, comprising:

oscillator means for generating a pulse signal of constant frequency;

pulse width modulator means for varying the duty cycle of the pulse signal;

converter means for receiving the modulated pulse signal as an input and providing as an output an AC signal, the fundamental frequency of which follows the frequency of the pulse signal and the symmetry of which varies with the duty cycle of the pulse signal;

a resonant circuit into which the load is connected, the resonant circuit being driven by the AC signal, such that a change in the symmetry of the AC signal changes the level of current flowing through the load,

the load being isolated from the converter means and the resonant circuit by means of an isolating transformer, the resonant circuit being designed to use impedance reflected through the isolating transformer.

2. A circuit according to claim 1, further comprising:

current sensing means for generating a current level signal proportional to the amount of current flowing through the load; and

comparator means for comparing the current level signal with a dimming level signal indicative of the desired level of current flow through the load,

the pulse width modulator means including means for adjusting the duty cycle of the pulse signal based on the result of the comparison of the current level signal with the dimming level signal.

3. A circuit according to claim 1, wherein the pulse width modulator means varies the duty cycle of the pulse signal between 0 and 50 percent, and wherein the AC signal is symmetric at a duty cycle of 50 percent and increasingly asymmetric as the duty cycle approaches 0 percent.

4. A circuit according to claim 3, wherein the ratio between the frequency of the pulse signal and the resonant frequency of the resonant circuit is greater than one.

5. A control circuit according to claim 1, wherein the converter means comprises:

a lower driver for receiving the modulated pulse signal as an input and for actuating a first switch on a DC supply to create the lower half of the AC signal output;

an upper driver for receiving the modulated pulse signal as an input and for actuating a second switch on the DC supply to create the upper half of the AC signal output;

delay means for introducing a delay between the actuation of the lower and upper drivers, such that the first and second switches do not conduct at the same time.

6. A circuit according to claim 1, wherein the resonant circuit includes an inductor and a capacitor connected in series with the load.

7. A circuit for controlling the flow of current through a load, comprising:

oscillator means for generating a pulse signal of constant frequency;

pulse width modulator means for varying the duty cycle of the pulse signal;

converter means for receiving the modulated pulse signal as an input and providing as an output an AC signal, the fundamental frequency of which follows the frequency of the pulse signal and the symmetry of which varies with the duty cycle of the pulse signal;

a resonant circuit into which the load is connected, the resonant circuit being driven by the AC signal, such that a change in the symmetry of the AC signal changes the level of current flowing through the load,

the converter means comprising;

a lower driver for receiving the modulated pulse signal as an input and for actuating a first switch on a DC supply to create the lower half of the AC signal output;

an upper driver for receiving the modulated pulse signal as an input and for actuating a second switch on a DC supply to create the upper half of the AC signal output;

delay means for introducing a delay between the actuation of the lower and upper drivers, such that the first and second switches do not conduct at the same time,

the delay means comprising an upper transistor network and a lower transistor network,

the upper transistor network comprising;

a first transistor, the collector of which is connected to a voltage source, the emitter of which is connected to ground, and the base of which is held at the first transistor'"'"'s V_BE by a first capacitor charged by the voltage source; and

a second transistor, the collector of which is connected between the voltage source and the first capacitor, the emitter of which is connected to ground, and the base of which receives the pulse signal as an input,

such that when a pulse commences, the second transistor turns on, causing the first capacitor to discharge through the second transistor, thereby causing the first transistor to turn off, and

such that when a pulse concludes, the second transistor turns off, causing the first capacitor to charge, thereby causing the first transistor to turn on after the first capacitor is charged;

the lower transistor network comprising;

a third transistor, the collector of which is connected to a voltage source, the emitter of which is connected to ground, and the base of which is connected to a voltage source;

a fourth transistor, the collector of which is connected between the voltage source and the base of the third transistor, the emitter of which is connected to ground, and the base of which is held at the fourth transistor'"'"'s V_BE by a second capacitor charged by the voltage source;

a fifth transistor, the collector of which is connected between the voltage source and the second capacitor, the emitter of which is connected to ground, and the base of which is connected to the voltage source; and

a sixth transistor, the collector of which is connected to the voltage source, the emitter of which is connected to ground, and the base of which receives the pulse signal as an input,

such that when a pulse commences, the sixth transistor turns on, causing the fifth transistor to turn off, causing the second capacitor to charge, causing the fourth transistor to turn on after the capacitor is charged, causing the third transistor to turn off, and

such that when a pulse concludes, the sixth transistor turns off, causing the fifth transistor to turn on, causing the second capacitor to discharge, causing the fourth transistor to turn off, causing the third transistor turn on.

8. A circuit for controlling the flow of current through a load, comprising:

self-oscillating inverter means connected across a DC power supply for providing as an output an AC signal, the self-oscillating inverter means comprising first and second switches actuated, respectively, by first and second control inputs, and further comprising first and second feedback paths between the inverter output and, respectively, the first and second control inputs;

timer means connected into the second feedback path, between the inverter output and the second switch, the timer means adjusting the "on" time of the second switch in response to a "length" input, while the "on" time of the first switch remains substantially constant;

isolation interface means for receiving as an input a dimming signal and for providing as an output a signal that is used to generate the "length" input of the timer means; and

resonant circuit means into which the load is connected, the resonant circuit receiving as an input the AC signal output of the inverter means and being tuned such that a change in the "on" time of the second switch results in a corresponding change in the current flowing through the load.

9. A circuit according to claim 8, further including:

a third switch coupled between the control input of the second switch and ground so as to turn off the second switch when a signal is applied to the control input of the third switch,

the timer means further including;

means for generating a switch-actuating signal to actuate the third switch, and

reset input means connected to the inverter output for resetting the timer means when the voltage across the second switch drops towards zero, the timer means "length" input determining the interval between the time at which the timer means is rest and the time at which the timer means generates the switch-actuating signal.