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Differentially coupled AND/NAND and XOR/XNOR circuitry

  • US 5,583,456 A
  • Filed: 08/25/1995
  • Issued: 12/10/1996
  • Est. Priority Date: 08/25/1994
  • Status: Expired due to Fees
First Claim
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1. A semiconductor integrated circuit, comprising:

  • a first pair of transistors of first polarity differentially inputted with first logical values, sources of said first pair of transistors being interconnected;

    a first constant current source for driving said first pair of transistors of said first polarity;

    second and third pairs of transistors of second polarity, each of said second and third pairs of transistors being differentially inputted with second logical values, the sources of each of said second and third pairs of transistors being interconnected and respectively connected to drains of said first pair of transistors;

    second and third constant current sources for driving said second and third pairs of transistors, respectively; and

    load resistors connected to said second and third pairs of transistors, respectively.

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