Correcting circuit for mixing circuit receiver using same and frequency spectrum inverting circuit using same

• US 5,584,066 A
• Filed: 10/07/1994
• Issued: 12/10/1996
• Est. Priority Date: 10/08/1993
• Status: Expired due to Fees

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Okanobu, Taiwa
• Primary Examiner(s): Eisenzopf, Reinhard J.
• Assistant Examiner(s): VO, NGUYEN THANH
• Application Number:
  US08/320,040
• Time in Patent Office: 795 Days
• Field of Search: 455/232.1, 455/234.1, 455/234.2, 455/250.1, 455/296, 455/307, 455/310, 455/311, 455/302, 455/313, 455/317, 455/114, 455/118, 455/314, 455/324, 455/226.2 , 455/303, 455/319, 455/326, 455/50.1, 455/63, 375/296, 331/10-12, 332/103, 332/123, 332/126, 332/127, 329/318, 329/319, 329/320, 329/325, 329/304
• US Class Current: 455/302
• CPC Class Codes: H03D 2200/0025 Gain control circuits
• CPC Class Codes: H03D 2200/0033 Current mirrors
• CPC Class Codes: H03D 2200/0047 Offset of DC voltage or frequency
• CPC Class Codes: H03D 2200/0088 Reduction of intermodulation, nonlinearities, adjacent channel interference; intercept points of harmonics or intermodulation products
• CPC Class Codes: H03D 2200/009 Reduction of local oscillator or RF leakage
• CPC Class Codes: H03D 7/1433 using bipolar transistors H03D7/145 takes precedence
• CPC Class Codes: H03D 7/1458 Double balanced arrangements, i.e. where both input signals are differential
• CPC Class Codes: H03D 7/166 using two or more quadrature frequency translation stages
• CPC Class Codes: H04B 1/26 for superheterodyne receivers multiple frequency-changing H03D7/16
• CPC Class Codes: H04B 1/30 for homodyne or synchrodyne receivers demodulator circuits H03D1/22

Abstract

A double superheterodyne receiver comprising a pair of first mixer circuits, a pair of second mixer circuits, a demodulator circuit, and a pair of detector circuits. The first mixer circuits are connected in an orthogonal relation to each other and acts to convert a received RF signal into a pair of first intermediate-frequency (IF) signals in the baseband. The second mixer circuits are connected in an orthogonal relation to each other and acts to convert the first IF signals into a pair of second IF signals of a given center frequency. The demodulator circuit arithmetically combines the second IF signals so as to create a third IF signal, and demodulates the original signal from the third IF signal. The output signals from the second mixer circuits are supplied to the detector circuits, which in turn detect the carrier component contained in the output signals. The output signals from the detector circuits are fed to the second mixer circuits. The DC balance between the second mixer circuits is so corrected that the leaking carrier components are reduced.

Claims

1. A double superheterodyne receiver comprising:

a pair of first mixer circuits connected in an orthogonal relation to each other and acting to convert a received RF signal into first intermediate-frequency signals in a baseband;

a pair of second mixer circuits connected in an orthogonal relation to each other and acting to convert said first intermediate-frequency signals into second intermediate-frequency signals of a desired center frequency;

a demodulator circuit for arithmetically combining said second intermediate-frequency signals so as to create a third intermediate-frequency signal and for a demodulating an original signal from said third intermediate-frequency signal; and

,

a pair of detector circuits receiving output signals from said pair of second mixer circuits and acting to detect a leaking carrier component contained in said output signals from said pair of second mixer circuits, said detector circuits producing output signals having the same phase as said leaking carrier component, wherein said output signals from said detector circuits are provided to said pair of second mixer circuits to correct DC balance between said pair of second mixer circuits so that said leaking carrier component is reduced.

2. The double superheterodyne receiver of claim 1, wherein each of said detector circuits includes a synchronous detector circuit, said output signals from said pair of said second mixer circuits being fed as detected input signals to said synchronous detector circuits, and wherein a local oscillator signal supplied to said second mixer circuits is supplied as a reference signal to said synchronous detector circuits.

3. The double superheterodyne receiver of claim 1, further comprising a level control portion for detecting a level of said third intermediate-frequency signal and for controlling a level of said received RF signal according to the detected level.

4. The double superheterodyne receiver of claim 1, further comprising filters for passing said first and second intermediate frequency signals.

5. A double superheterodyne receiver comprising:

a pair of first mixer circuits connected in an orthogonal relation to each other and acting to convert a received RF signal into a pair of first intermediate-frequency signals in a baseband;

a pair of second mixer circuits connected in an orthogonal relation to each other and acting to convert said first intermediate-frequency signals into second intermediate-frequency signals of a desired center frequency;

a demodulator circuit for arithmetically combining said second intermediate-frequency signals so as to create a third intermediate-frequency signal and for demodulating an original signal from said third intermediate-frequency signal, wherein at least said first mixer circuits and said demodulator circuit are formed on an integrated circuit; and

,

a pair of detector circuits receiving output signals from said second mixer circuits and acting to detect a leaking carrier component contained in said output signals from said second mixer circuits, said detector circuits producing output signals having the same phase as said leaking carrier component, wherein said output signals from said detector circuits are provided to said second mixer circuits to correct DC balance between said second mixer circuits in such a way that said leaking carrier component is reduced.

6. The double superheterodyne receiver of claim 5, further comprising a level control portion for detecting a level of said third intermediate-frequency signal and for controlling a level of said received RF signal according to the detected level.

7. The double superheterodyne receiver of claim 5, further comprising filters for passing said first and second intermediate-frequency signals, and wherein each of said filters consists of an active filter.

8. A circuit for inverting a frequency spectrum, comprising:

a carrier signal-generating circuit for producing a carrier signal;

a balanced modulator circuit receiving said carrier signal from said carrier signal-generating circuit and an audio signal as a modulating input signal, said audio signal having a limited bandwidth; and

,

a detector circuit receiving an output signal from said balanced modulator circuit and acting to detect a leaking carrier component contained in said output signal from said balanced modulator circuit, said detector circuit producing an output signal having the same phase as said leaking carrier component, wherein said output signal from said detector circuit is provided to said balanced modulator circuit to correct DC balance in said balanced modulator circuit in such a way that said leaking carrier component decreases.

9. A circuit for inverting a frequency spectrum as set forth in claim 8, wherein said detector circuit comprises a synchronous detector circuit receiving said output signal from said balanced modulator circuit, and wherein said carrier signal from said carrier signal-generating circuit is supplied as a reference signal to said synchronous detector circuit.

10. A circuit for inverting a frequency spectrum as set forth in claim 9, wherein said detector circuit further comprises a low-pass filter for receiving an output signal from said synchronous detector circuit.

11. A circuit for inverting a frequency spectrum as set forth in claim 10, wherein said output signal from said synchronous detector circuit is supplied to said balanced modulator circuit via said low-pass filter.

12. A correcting circuit for a mixer circuit, comprising:

a double balanced modulator circuit receiving a carrier signal and acting to convert a frequency of an input signal into a second frequency and to produce a first output signal of said second frequency; and

,

a detector circuit receiving said output signal from said double balanced modulator circuit and acting to detect a leaking carrier component contained in said output signal, said detector circuit producing an output signal having the same phase as said leaking carrier component, wherein said output signal from said detector circuit is provided to said double balanced modulator circuit to correct DC balance in said double balanced modulator circuit in such a way that said leaking carrier component decreases.

13. A correcting circuit for a mixer circuit as set forth in claim 12, further comprising a carrier signal-generating circuit, wherein said detector circuit is equipped with a synchronous detector circuit receiving said output signal from said double balanced modulator circuit, and wherein said carrier signal from said carrier signal-generating circuit is supplied as a reference signal to said synchronous detector circuit.

14. A correcting circuit for a mixer circuit as set forth in claim 13, wherein said detector circuit is equipped with a low-pass filter receiving an output signal from said synchronous detector circuit, and wherein said output signal from said synchronous detector circuit is supplied to said double balanced modulator circuit via said low-pass filter.