Logic LSI
First Claim
1. A logic LSI having a plurality of modules including a CPU contained in one chip, comprising:
- a basic-clock generator for supplying a basic clock to the modules;
a frequency controller including storage means for storing frequency changing conditions including signals for designating modules whose frequencies are to be changed for each frequency changing condition, and signals for designating predetermined frequencies, for comparing sequentially-input status conditions of the logic LSI with the frequency changing conditions stored in the storage means and, when one of the status conditions conforms with one of the frequency changing conditions, for supplying the modules with a predetermined one of the signals for designating a module for a change of frequency and a corresponding signal for designating one of the predetermined frequencies to which the designated module is to be changed; and
whereineach of the plurality of modules includes an internal clock generator for generating a plurality of internal clocks in synchronization with the basic clock, means for selectively receiving said predetermined one of the signals for designating a module for a change of frequency when one of the modules is the designated module and further for receiving the corresponding signal for designating one of the predetermined frequencies, and means for selecting one of the internal clocks according to the received corresponding frequency designating signal.
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Accused Products
Abstract
A logic LSI has a plurality of modules such as a CPU contained in one chip. Frequency changing conditions, signals for designating modules whose frequencies are changed for each frequency changing condition, and signals for designating frequencies to be changed are stored in a storage device of a frequency controller, software-wise. The sequentially-input status of the logic LSI is compared with the stored frequency changing conditions and, when the former conforms to the latter, a signal for changing the corresponding frequency is applied to each of the plurality of modules. Each of the modules generates a plurality of internal clocks in synchronization with the basic clock and selects one out of the internal clocks according to the frequency changing signal.
27 Citations
11 Claims
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1. A logic LSI having a plurality of modules including a CPU contained in one chip, comprising:
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a basic-clock generator for supplying a basic clock to the modules; a frequency controller including storage means for storing frequency changing conditions including signals for designating modules whose frequencies are to be changed for each frequency changing condition, and signals for designating predetermined frequencies, for comparing sequentially-input status conditions of the logic LSI with the frequency changing conditions stored in the storage means and, when one of the status conditions conforms with one of the frequency changing conditions, for supplying the modules with a predetermined one of the signals for designating a module for a change of frequency and a corresponding signal for designating one of the predetermined frequencies to which the designated module is to be changed; and
whereineach of the plurality of modules includes an internal clock generator for generating a plurality of internal clocks in synchronization with the basic clock, means for selectively receiving said predetermined one of the signals for designating a module for a change of frequency when one of the modules is the designated module and further for receiving the corresponding signal for designating one of the predetermined frequencies, and means for selecting one of the internal clocks according to the received corresponding frequency designating signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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Specification