Active-matrix substrate

• US 5,585,951 A
• Filed: 12/23/1993
• Issued: 12/17/1996
• Est. Priority Date: 12/25/1992
• Status: Expired due to Term

• Current Assignee: Sony Corporation (Sony Group Corp.)
• Original Assignee: Sony Corporation (Sony Group Corp.)
• Inventors: Nakamua, Shinji, Noda, Kazuhiro, Kadota, Hisashi, Hayashi, Hisao
• Primary Examiner(s): Sikes, William L.
• Assistant Examiner(s): NGUYEN, TIEP HUU
• Application Number:
  US08/172,644
• Time in Patent Office: 1,090 Days
• Field of Search: 359/59, 359/68, 359/74
• US Class Current: 349/122
• CPC Class Codes: G02F 1/136209 Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
• CPC Class Codes: G02F 1/136222 Colour filters incorporated in the active matrix substrate
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer

Abstract

An active-matrix substrate has a layered structure in which an upper region including a plurality of pixel electrodes arranged in a matrix and a lower region including a plurality of thin film transistors for driving the individual pixel electrodes are overlapped on each other. A planarization layer is interposed between both of the substrates. An active-matrix liquid crystal display device includes a main substrate and a facing substrate which are disposed to face to each other at a specified interval. A liquid crystal layer having a specified thickness is held between both of the substrates. A device bus line area including a plurality of thin film transistor devices and bus lines is formed on the surface of the main substrate. A planarization layer is formed to embed the irregularities on the surface of the device bus line area. Pixel electrodes in a matrix are formed on the flat surface of the planarization layer. An interval dimension between the adjacent pixel electrodes is set to be larger than a thickness dimension B of the liquid crystal layer, so that the subsidiary lateral electric field is made smaller than the normal vertical electric field.

Claims

1. An active-matrix substrate, comprising:

an upper region having a plurality of flat planar pixel electrodes arranged in a matrix;

a lower region having a plurality of thin film transistors, each of which is associated with each pixel electrode and wherein the flat planar pixel electrodes overlie respective thin film transistors;

a planarization layer arranged between the upper and lower regions to planarize a surface of the lower region and to provide a flat planar surface on which the flat planar pixel electrodes overlie the thin film transistors; and

said planarization layer comprising a transparent resin film.

2. An active-matrix substrate as claimed in claim 1, further comprising a black mask formed at a boundary between adjacent pixel electrodes.

3. An active-matrix substrate as claimed in claim 1, further comprising a plurality of color filters, each of which is associated with a corresponding pixel electrode.

4. An active-matrix substrate as claimed in claim 3, wherein said color filters are formed only at a light transmissive region.

5. An active-matrix substrate as claimed in claim 4, wherein said planarization layer is formed on the light transmissive region.

6. An active-matrix substrate, comprising:

an upper region having a plurality of flat planar pixel electrodes arranged in a matrix;

a lower region having a plurality of thin film transistors, each of which is associated with each pixel electrode and wherein the flat planar pixel electrodes overlie respective thin film transistors;

a planarization layer arranged between the upper and lower regions to planarize a surface of the lower region and to provide a flat planar surface on which the flat planar pixel electrodes overlie the thin film transistors;

a black mask formed at a boundary between adjacent pixel electrodes; and

said black mask

comprising a bus line formed at the lower region.

7. An active-matrix substrate, comprising:

an upper region having a plurality of pixel electrodes arranged in a matrix;

a lower region having a plurality of thin film transistors, each of which is associated with each pixel electrode;

a planarization layer arranged between the upper and lower regions to planarize a surface of the lower region;

a plurality of color filters, each of which is associated with a corresponding pixel electrode; and

said color filters being comprised of the planarization layer.

8. An active-matrix liquid crystal display device, comprising:

first and second substrates arranged in parallel to each other;

said first substrate comprising an upper region which has a plurality of flat planar pixel electrodes arranged in a matrix, a lower region which has a plurality of thin film transistors, each of which is associated with and underlies each pixel electrode, and a planarization layer arranged between the upper and lower regions to planarize a surface of the lower region and to provide a flat planar surface on which the flat planar pixel electrodes overlie the respective thin film transistors;

a liquid crystal layer formed between the first and second substrates; and

a distance between said adjacent pixel electrodes being larger than a thickness of the liquid crystal layer.

9. An active-matrix liquid crystal display device as claimed in claim 8, further comprising a separating means for separating adjacent pixel electrodes from each other.

10. An active-matrix liquid crystal display device as claimed in claim 9, wherein said separating means comprises a groove surrounding the pixel electrode.

11. An active-matrix liquid crystal display device as claimed in claim 8, wherein each of said pixel electrodes has a symmetrical shape so that a lateral electric field caused between adjacent pixel electrodes in a vertical direction of the matrix is homogenized.

12. An active-matrix liquid crystal display device comprising:

first and second substrates arranged in parallel to each other;

said first substrate comprising an upper region which has a plurality of pixel electrodes arranged in a matrix, a lower region which has a plurality of thin film transistors, each of which is associated with each pixel electrode, and a planarization layer arranged between the upper and lower regions to planarize a surface of the lower region;

a liquid crystal layer formed between the first and second substrates;

a separating means for separating adjacent pixel electrodes from each other;

said separating means comprising a groove surrounding the pixel electrode; and

said groove being formed at the planarization layer.

13. A method of manufacturing an active-matrix substrate, comprising the steps of:

forming a first region which has a plurality of thin film transistors formed on a substrate;

planarizing an uneven surface of the first region by applying a liquid transparent resin and then hardening the resin to form a planarization layer to provide a flat planar surface overlying the thin film transistors; and

forming a second region which has a plurality of flat planar pixel electrodes on the flat planar surface of the planarization layer overlying the respective thin film transistors.

14. A method as claimed in claim 13, further comprising a contacting step for electrically contacting the pixel electrode with the corresponding thin film transistor through a contact hole.

15. A method of manufacturing an active-matrix substrate, comprising the steps of:

forming a first region which has a plurality of thin film transistors formed on a substrate;

planarizing an uneven surface of the first region by a planarization layer to provide a flat planar surface overlying the thin film transistors;

forming a second region which has a plurality of flat planar pixel electrodes on the flat planar surface of the planarization layer overlying the respective thin film transistors;

in a contacting step, electrically contacting the pixel electrode with the corresponding thin film transistor through a contact hole;

after applying a photolithography and etching the planarization layer comprised of a photosensitive resin to form the contact hole.