Method for increased performance from a memory stream buffer by eliminating read-modify-write streams from history buffer

• US 5,586,294 A
• Filed: 02/16/1994
• Issued: 12/17/1996
• Est. Priority Date: 03/26/1993
• Status: Expired due to Term

• Current Assignee: Hewlett-Packard Development Company, L.P. (HP Inc.)
• Original Assignee: Digital Equipment Corporation (HP Inc.)
• Inventors: Goodwin, Paul M., Thaller, Kurt M.
• Primary Examiner(s): Asta, Frank J.
• Application Number:
  US08/197,368
• Time in Patent Office: 1,035 Days
• Field of Search: 395/482, 395/445, 395/375, 395/452, 395/464, 395/850, 395/872, 395/875, 364/239.4, 364/926.4
• US Class Current: 711/137
• CPC Class Codes: G06F 13/1631 through address comparison

Abstract

A read buffering system employs FIFOs to hold sequential read data for a number of data streams being fetched by a computer. When the system sees a read command from the CPU, it stores an incremented value of the address of the read command in a history buffer and marks the entry as valid. The system detects a stream when a subsequent read command specifies an address that matches the address value stored in the history buffer. Upon detecting a stream, the system fetches data from DRAMs at addresses that follow the address of the subsequent read command, and stores it in a FIFO. However, to reduce unnecessary prefetching, the system looks for a read X, write X, read X+1 (where X and X+1 designate addresses) succession of commands so as to prevent them from creating a stream. This succession occurs often and qualifies as a stream, but is seldom followed by other reads that maintain the stream. The system checks for this succession by comparing an incremented value of the address of the write command with each valid address value stored in the history buffer. A match causes the system to invalidate the history buffer entry containing the matched address value. This effectively disables the use of this address value for detecting a stream upon subsequent read commands and, consequently, for prefetching data from memory.

Claims

1. A method of fetching data from a memory, comprising the steps of:

receiving a first read command specifying a first address of said memory to be read;

receiving a subsequent write command specifying an address of said memory to be written;

receiving a second read command, subsequent to said write command, specifying a second address of said memory to be read, said second address sequentially following said first address; and

in response to said second read command, if said first address to be read and said address to be written are different addresses, fetching data from said memory at an address that follows said second address specified in said second read command, and otherwise refraining from said fetching.

2. The method of claim 1, further comprising the steps of:

in response to said first read command, storing a first computed address value corresponding to said first address into a history buffer entry and marking said entry as valid;

in response to said write command, comparing a second computed address value corresponding to said address to be written with said stored first computed address value, and, if they match, marking said history buffer entry as invalid;

in response to said second read command, comparing said second address to be read with said stored first computed address value, said comparing resulting in generating a match signal; and

in response to said match signal, if said history buffer entry is valid, generating a stream-detect signal, and otherwise refraining from generating said stream-detect signal; and

wherein said step of data fetching is in response to said stream-detect signal.

3. A method according to claim 2, wherein said first and second computed address values each result from incrementing the address specified in the corresponding command.