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Method of forming bipolar junction transistor of epitaxial planar type

  • US 5,587,326 A
  • Filed: 10/23/1992
  • Issued: 12/24/1996
  • Est. Priority Date: 10/24/1991
  • Status: Expired due to Fees
First Claim
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1. A fabrication method of a bipolar junction transistor of an epitaxial planar type comprising:

  • a first step of preparing a semiconductor substrate with a primary surface;

    a second step of forming a collector region of a first conductivity type in the primary surface of said semiconductor substrate;

    a third step of forming a base region of a second conductivity type on said collector region, said base region having a base exposure surface;

    a fourth step of forming an insulating layer overlying said base region, said insulating layer having an opening in registry with a predetermined surface portion of said base exposure surface;

    a fifth step of forming a conductor film on said predetermined surface in said opening, said conductor film including an additive which prevents grain growth of poly-silicon, said additive is selected from a group consisting of C, O and P, and said conductive film has a predetermined thickness not thicker than 100 Å

    ;

    a sixth step of forming a poly-silicon layer overlying said conductive film; and

    a seventh step of forming an emitter region of a first conductivity type in said predetermined surface portion of said base exposure surface, said conductive film and said poly-silicon layer serving as an emitter poly-silicon electrode layer;

    said seventh step further comprising the substeps of;

    doping an impurity of the first conductivity type in said poly-silicon layer; and

    thermally diffusing said impurity from said poly-silicon layer into said base region through said conductive film to form said emitter region in said base region.

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