Multiplier based transconductance amplifiers and transconductance control circuits
First Claim
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1. A transconductance amplifier comprising:
- a FET differential input stage, the input stage having a current output; and
,a Gilbert multiplier output stage coupled to the output of the input stage to amplify the current output of the FET differential input stage;
the FET differential input stage having a pair of FET transistors each having a source, a drain and a gate, the drains of the pair of FET transistors being directly coupled to the Gilbert multiplier output stage, the sources of the pair of FET transistors being coupled to a bias voltage and the gates of the pair of FET transistors forming the differential input thereof.
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Abstract
Multiplier based transconductance amplifiers utilizing the combination of FET differential input stages and Gilbert multiplier output stages are disclosed. The amplifiers provide a high input resistance, high output resistance, and wide gm adjustment range without need for output level-shifting stages. Also disclosed are various transconductance control circuits which require only a simple one-transistor voltage buffer in the feedback loop rather than the two more complex voltage amplifiers required by the prior art. Various embodiments are disclosed.
42 Citations
32 Claims
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1. A transconductance amplifier comprising:
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a FET differential input stage, the input stage having a current output; and
,a Gilbert multiplier output stage coupled to the output of the input stage to amplify the current output of the FET differential input stage; the FET differential input stage having a pair of FET transistors each having a source, a drain and a gate, the drains of the pair of FET transistors being directly coupled to the Gilbert multiplier output stage, the sources of the pair of FET transistors being coupled to a bias voltage and the gates of the pair of FET transistors forming the differential input thereof. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
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27. A transconductance amplifier comprising:
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a FET differential input stage; and
,a Gilbert multiplier output stage; the FET differential input stage having a pair of FET transistors each having a source, a drain and a gate, the drains of the pair of FET transistors being coupled to the Gilbert multiplier output stage through a pair of bipolar junction transistors in a cascode connection between the FET differential input stage and the Gilbert multiplier output stage, the bases of the bipolar junction transistors being coupled to a bias voltage, the sources of the pair of PET transistors being coupled to a bias voltage and the gates of the pair of FET transistors forming the differential input thereof. - View Dependent Claims (28, 29, 30, 31)
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32. A transconductance amplifier comprising:
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a FET differential input stage, the input stage having a current output; and
,a Gilbert multiplier output stage coupled to the output of the input stage to amplify the current output of the FET differential input stage; the FET differential input stage having a pair of FET transistors each having a source, a drain and a gate, the sources of the pair of FET transistors being coupled to the Gilbert multiplier output stage, the drains of the pair of FET transistors being coupled to a bias voltage and the gates of the pair of FET transistors forming the differential input thereof.
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Specification