Low voltage sensing circuits for battery powered devices having a micro-processor
First Claim
1. A low voltage sensing circuit for a battery powered device having a logic circuit or subsystem, and a voltage regulator;
- wherein an input direct current voltage from a battery is fed to a voltage regulator having at least an input terminal, an output terminal, and a third terminal connected to ground, wherein the output direct current voltage of said voltage regulator is lower than said input voltage and is fed to the emitter of a PNP transistor and to an input power terminal of a logic circuit or subsystem;
wherein the base of said PNP transistor is connected to a common point in a series resistor voltage divider comprising a first resistor and a second resistor, and the collector of said PNP transistor is connected to one end of a third reference resistor, the other end of which is connected to ground;
wherein the end of said first resistor that is remote from said common point is connected to said input voltage, the end of said second resistor that is remote from said common point is connected to one side of a capacitor, and the other side of said capacitor is connected to an output port of said logic circuit or subsystem;
wherein said collector of said PNP transistor is also connected to an input port of said logic circuit or subsystem;
wherein the voltage at said output port of said logic circuit or subsystem is normally held at said output voltage value, and the voltage at said input port is zero volts with respect to ground; and
means for periodically reducing the voltage at said output port for a predetermined interval of time to zero volts;
wherein the values of each of said first and second resistors are chosen so that, if said input voltage falls below a predetermined value and when said output voltage of said output port of said logic circuit or subsystem is temporarily reduced to zero, said transistor becomes conductive and a voltage appears across said third resistor.
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Accused Products
Abstract
A low voltage sensing circuit for a battery powered, micro-processor based circuit is provided. A standard voltage regulator has input voltage from a battery, and output voltage which is fed to a system requiring the same, which includes a micro-processor. A voltage divider is connected through a capacitor to an output port of the micro-processor; and the common point of the voltage divider is connected to the base or emitter of a transistor. Periodically, there is an output pulse from the output port of the micro-processor, which pulse has a predetermined length. During the output pulse from the micro-processor, the transistor may become conductive while the capacitor is recharging. Depending of the configuration, the fact that the transistor is conductive is indicative that the input voltage is either below or above a predetermined value. The width of the pulse that is created across a resistor connected to the collector of the transistor and also to an input port of the micro-processor, is indicative of how much below or above the predetermined value the input voltage from the battery has deviated. The predetermined input voltage is established by setting the values of the resistors in the series connected voltage divider.
23 Citations
18 Claims
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1. A low voltage sensing circuit for a battery powered device having a logic circuit or subsystem, and a voltage regulator;
- wherein an input direct current voltage from a battery is fed to a voltage regulator having at least an input terminal, an output terminal, and a third terminal connected to ground, wherein the output direct current voltage of said voltage regulator is lower than said input voltage and is fed to the emitter of a PNP transistor and to an input power terminal of a logic circuit or subsystem;
wherein the base of said PNP transistor is connected to a common point in a series resistor voltage divider comprising a first resistor and a second resistor, and the collector of said PNP transistor is connected to one end of a third reference resistor, the other end of which is connected to ground; wherein the end of said first resistor that is remote from said common point is connected to said input voltage, the end of said second resistor that is remote from said common point is connected to one side of a capacitor, and the other side of said capacitor is connected to an output port of said logic circuit or subsystem; wherein said collector of said PNP transistor is also connected to an input port of said logic circuit or subsystem; wherein the voltage at said output port of said logic circuit or subsystem is normally held at said output voltage value, and the voltage at said input port is zero volts with respect to ground; and means for periodically reducing the voltage at said output port for a predetermined interval of time to zero volts; wherein the values of each of said first and second resistors are chosen so that, if said input voltage falls below a predetermined value and when said output voltage of said output port of said logic circuit or subsystem is temporarily reduced to zero, said transistor becomes conductive and a voltage appears across said third resistor. - View Dependent Claims (2, 3, 4, 5, 6)
- wherein an input direct current voltage from a battery is fed to a voltage regulator having at least an input terminal, an output terminal, and a third terminal connected to ground, wherein the output direct current voltage of said voltage regulator is lower than said input voltage and is fed to the emitter of a PNP transistor and to an input power terminal of a logic circuit or subsystem;
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7. A low voltage sensing circuit for a battery powered device having a logic circuit or subsystem, and a voltage regulator;
- wherein an input direct current voltage from a battery is fed to a voltage regulator which is a switch mode DC--DC voltage converter having at least an input terminal, an output terminal, and a third terminal connected to ground, wherein the output direct current voltage of said voltage regulator is higher than said input voltage and is fed to the base of a PNP transistor and to an input power terminal of a logic circuit or subsystem;
wherein the emitter of said PNP transistor is connected to a common point in a series resistor voltage divider comprising a first resistor and a second resistor, and the collector of said PNP transistor is connected to one end of a third reference resistor, the other end of which is connected to ground; wherein the end of said first resistor that is remote from said common point is connected to said input voltage, the end of said second resistor that is remote from said common point is connected to one side of a capacitor, and the other side of said capacitor is connected to an output port of said logic circuit or subsystem; wherein said collector of said PNP transistor is also connected to an input port of said logic circuit or subsystem; wherein the voltage at said output port of said logic circuit or subsystem is normally held at zero volts with respect to ground, and the voltage at said input port is also at zero volts with respect to ground; and means for periodically increasing the voltage at said output port for a predetermined interval of time to said output voltage; wherein the value of the forward bias base to emitter voltage is known and the values of each of said first and second resistors are chosen so that, so long as said input voltage is above the value of a predetermined voltage when said output voltage of said output port of said logic circuit or subsystem is temporarily increased to said output voltage, said transistor becomes conductive and a voltage appears across said third resistor. - View Dependent Claims (8, 9, 10, 11, 12)
- wherein an input direct current voltage from a battery is fed to a voltage regulator which is a switch mode DC--DC voltage converter having at least an input terminal, an output terminal, and a third terminal connected to ground, wherein the output direct current voltage of said voltage regulator is higher than said input voltage and is fed to the base of a PNP transistor and to an input power terminal of a logic circuit or subsystem;
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13. A low voltage sensing circuit for a battery-powered device having a circuit or subsystem, and a DC voltage conversion device;
- wherein an input direct current voltage is fed to an input terminal of said DC voltage conversion device and an output direct current voltage is fed from an output terminal of said DC voltage conversion device to an input power terminal of a logic circuit or subsystem and to one of the base or emitter of a PNP transistor, and said DC voltage conversion device has a third terminal connected to the system ground;
wherein the other of said base or emitter of said PNP transistor is connected to a common point in a series resistor voltage divider comprising a first resistor and a second resistor, and the collector of said PNP transistor is connected to one end of a third reference resistor, the other end of which is connected to the system ground; wherein the end of said first resistor that is remote from said common point is connected to said input voltage, the end of said second resistor that is remote from said common point is connected to one side of a capacitor, and the other side of said capacitor is connected to an output port of said logic circuit or subsystem; wherein said collector of said PNP transistor is also connected to an input port of said logic circuit or subsystem; wherein the voltage at said output port of said logic circuit or subsystem is periodically changed so as to issue a voltage pulse which may temporarily cause said transistor to become conductive so that a voltage appears across said third resistor; and wherein the values of each of said first and second resistors are chosen so that conduction of said PNP transistor occurs during said voltage pulse when said input voltage has a predetermined relationship to a predetermined voltage. - View Dependent Claims (14)
- wherein an input direct current voltage is fed to an input terminal of said DC voltage conversion device and an output direct current voltage is fed from an output terminal of said DC voltage conversion device to an input power terminal of a logic circuit or subsystem and to one of the base or emitter of a PNP transistor, and said DC voltage conversion device has a third terminal connected to the system ground;
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15. A method of sensing low output voltage from a battery which supplies a varying input voltage over time to a battery powered device;
- wherein said battery powered device includes a logic circuit or subsystem, a DC voltage conversion device having a regulated output voltage, and a semiconductor circuit comprising a normally non-conductive semiconductor device together with other associated passive electrical components including resistors and a capacitor, and wherein said semiconductor circuit is connected to an output port of said logic circuit or subsystem;
wherein, during said methods, an output voltage pulse of known fixed amplitude is output from said output port of said logic circuit or subsystem, and is of substantially the same amplitude as said regulated output voltage from said DC voltage conversion device; and said output voltage pulse is fed to said semiconductor circuit; wherein said semiconductor will exhibit transient conduction during said pulse if the magnitude of said varying input battery voltage relative to the fixed amplitude of said output voltage pulse varies from a predetermined value. - View Dependent Claims (16, 17, 18)
- wherein said battery powered device includes a logic circuit or subsystem, a DC voltage conversion device having a regulated output voltage, and a semiconductor circuit comprising a normally non-conductive semiconductor device together with other associated passive electrical components including resistors and a capacitor, and wherein said semiconductor circuit is connected to an output port of said logic circuit or subsystem;
Specification