Parallel processing data network of master and slave transputers controlled by a serial control network

• US 5,590,284 A
• Filed: 09/26/1994
• Issued: 12/31/1996
• Est. Priority Date: 03/24/1992
• Status: Expired due to Fees

• Current Assignee: Fermi Research Alliance, LLC
• Original Assignee: Universities Research Association Incorporated
• Inventors: Crosetto, Dario B.
• Primary Examiner(s): Barry, Lance Leonard
• Application Number:
  US08/312,435
• Time in Patent Office: 827 Days
• Field of Search: 395/200.05, 395/200.12, 395/200.2, 395/306, 395/308, 395/311, 395/312, 395/800, 341/51, 340/825.79, 300/53, 300/67, 300/85.9
• US Class Current: 712/29
• CPC Class Codes: G06F 15/17368 non hierarchical topologies

Abstract

The present device provides for a dynamically configurable communication network having a multi-processor parallel processing system having a serial communication network and a high speed parallel communication network. The serial communication network is used to disseminate commands from a master processor (100) to a plurality of slave processors (200) to effect communication protocol, to control transmission of high density data among nodes and to monitor each slave processor'"'"'s status. The high speed parallel processing network is used to effect the transmission of high density data among nodes in the parallel processing system. Each node comprises a transputer (104), a digital signal processor (114), a parallel transfer controller (106), and two three-port memory devices. A communication switch (108) within each node (100) connects it to a fast parallel hardware channel (70) through which all high density data arrives or leaves the node.

Claims

1. A parallel data transfer network for the transfer of data controlled by a serial communication network to effect direct point to point communication between processing nodes arranged in an n-dimensional array, independent of physical or logical location of the processing nodes within the array, said parallel data transfer network comprising:

(a) a plurality of processing nodes, each adapted for processing, sending and receiving data and commands;

one of said nodes acting as a master node and at least one of said nodes acting as a slave node;

each processing node further comprising a transputer connected to (i) at least one serial link for serial transmission of commands to and from the processing node, (ii) at least one memory for retaining data being transferred to and from the processing node, and (iii) a switch connecting the at least one memory, through at least one parallel data bus, to a hardware parallel channel for transmission of data to and from the processing node;

(b) a plurality of serial links connecting at least two of said processing nodes for the serial transmission of commands between said at least two processing nodes;

(c) a parallel hardware channel connected to said processing nodes by a plurality of parallel data buses for the transmission of data between said processing nodes in response to the commands serially transmitted over the serial links; and

(d) a plurality of parallel data buses, each parallel data bus connecting one of said processing nodes to the parallel hardware channel.

2. The network of claim 1 wherein said nodes each further comprise a parallel transfer controller coupled between the at least one memory and the transputer for controlling the flow of data in and out of the at least one memory to and from the parallel hardware channel and to and from the transputer.

3. The network of claim 1 wherein said processing nodes each further comprise a digital signal processor coupled between the at least one memory, the transputer, and the parallel hardware channel for processing the data in the at least one memory prior to transmitting the data on the parallel hardware channel and for processing the data in the at least one memory after receiving it from the parallel hardware channel.

4. The network of claim 1 wherein the serial links of at least part of said plurality of processing nodes are connected by a serial link crossbar switch to effect direct point to point serial communication of parallel data transmission control commands between processing nodes, arranged in an n-dimensional array, independent of physical or logical location of the processing nodes within the parallel processing array.

5. A parallel processing system comprising:

(a) a plurality of processing nodes, each adapted for processing, sending and receiving data and commands;

at least one of said processing nodes acting as a master node and at least one of said processing nodes acting as a slave node;

each processing node further comprising a transputer connected to (i) at least one serial link for serial transmission of commands to and from the processing node, (ii) at least one memory for retaining data being transferred to and from the processing node, and (iii) a switch connecting the at least one memory, through at least one parallel data bus, to a hardware parallel channel for transmission of data to and from the processing node;

(b) a plurality of serial links connecting at least two of said processing nodes for the serial transmission of commands between said at least two processing nodes;

(c) a parallel hardware channel connected to said processing nodes by a plurality of parallel data buses for the transmission of data between said processing nodes under the control of the commands serially transmitted over the serial links; and

(d) a plurality of parallel data buses, each parallel data bus connecting one of said processing nodes to the parallel hardware channel.

6. The system of claim 5 further comprising a parallel transfer controller coupled between the processing node and the parallel channel for controlling the transfer of data over the parallel channel.

7. The system of claim 6 wherein

(a) the plurality of serial links is dedicated solely to the serial transfer of control commands between the processing nodes and

(b) the parallel channel is dedicated solely to the transfer of data so that the total time required to send control signals and to transfer data is minimized.

8. The system of claim 7 wherein the transfer of control commands is effected using a software protocol simplified to process only control commands.

9. The system of claim 7 wherein the transfer of data is effected using a protocol simplified to transmit and receive only data.

10. The system of claim 6 wherein each of the processing nodes comprises a means for applying pattern recognition to the data.

11. The system of claim 5 wherein each of the processing nodes each comprises a transputer.

12. The system of claim 5 wherein each of the processing nodes comprises a means for compacting and expanding the data.

13. The system of claim 5 wherein each of the processing nodes comprises a means for filtering and pattern recognition of the data.

14. A communication network in the parallel processing system of claim 5 comprising:

a parallel network for parallel transfer of data controlled by commands serially transmitted on a serial network to effect direct point to point communication between at least two processing nodes of the parallel processing system, arranged in an n-dimensional array, independent of physical or logical location of the processing nodes within the array.