Current limiter for implantable electronic device lead

• US 5,591,218 A
• Filed: 08/09/1994
• Issued: 01/07/1997
• Est. Priority Date: 08/11/1993
• Status: Expired due to Term

• Current Assignee: Ela Medical S.A. (LivaNova Plc)
• Original Assignee: Ela Medical S.A. (LivaNova Plc)
• Inventors: Jacobson, Peter
• Primary Examiner(s): Kamm, William E.
• Application Number:
  US08/287,835
• Time in Patent Office: 882 Days
• Field of Search: 128/908, 607/1, 607/2, 607/62, 607/63
• US Class Current: 607/63
• CPC Class Codes: A61N 1/3704 Circuits specially adapted therefor, e.g. for sensitivity control
• CPC Class Codes: Y10S 128/908 Patient protection from electric shock

Abstract

The invention protects circuits connected to low energy stimulating (pacing) or detection (sensing) electrodes of an implantable medical device from high energy pulses generated by the device itself or by external devices such as external defibrillators. It also protects cardiac tissue near the low energy electrodes. The invention provides for an automatic and/or foldback-type unidirectional current limiter in each low energy lead. The invention, when applied to an implantable defibrillator/pacemaker, also provides a shock generator presenting pulses to the pacing electrodes only in the direction blocked by the current limiter.

Claims

1. A unidirectional current limiting circuit for use in series with the lead of an implanted medical device having low energy stimulation and detection electrodes, comprising:

an unprotected input and a protected output;

a current flow from the unprotected input to the protected output;

a reference potential corresponding to a ground potential;

.

a bias voltage;

a first switch having an open circuit condition, a current limiting condition, and a closed circuit condition, the first switch having an input connected to the unprotected input and an output;

a low value resistor connected to the output of the first switch producing a first voltage in response to said current flow through the first switch;

a second switch having an open circuit condition and a closed circuit condition the second switch being operatively connected between the bias voltage and the protected output;

a voltage divider connected to the unprotected input and the protected output, said voltage provider and producing a control voltage corresponding to a voltage across the unprotected input and the protected output; and

a voltage clamp circuit connected between the reference potential and the protected output and operable to maintain the protected output voltage within a preset voltage range of the reference voltage;

wherein the first switch is biased in the closed circuit condition when the voltage of the low value resistor is below the bias voltage by a first predetermined amount, the first switch is biased in the current limiting condition when the voltage of the low value resistor is not below the bias voltage by the first predetermined amount, and wherein the second switch is automatically biased in the open circuit condition when the control voltage is less than a second predetermined amount and in the closed circuit condition when the control voltage is greater than the second predetermined amount, the second switch closed circuit condition effectively lowering the bias voltage to place and maintain the first switch in the open circuit condition.

2. The apparatus of claim 1 wherein the first switch further comprises an N channel enhancement FET having a gate connected to the bias voltage, a drain connected to the unprotected input, and a source connected to the low value resistor, and the first predetermined amount is the FET threshold voltage.

3. The apparatus of claims 1 wherein the second switch is characterized by an NPN bipolar transistor having a collector connected to the bias voltage, an emitter connected to the protected output, and a base connected to the control voltage of the voltage divider, and the second predetermined amount is the base to emitter threshold voltage of the transistor.

4. The apparatus of claim 3 wherein the voltage divider further comprises a first resistor connected between the unprotected input and the transistor base and a second resistor connected between the transistor base and the protected output.

5. The apparatus of claim 1 further comprising a zener diode connected between the transistor collector and emitter.

6. The apparatus of claim 1 wherein the voltage clamp circuit further comprises a zener diode.