Apparatus and method for video pixel data transfer

• US 5,592,233 A
• Filed: 06/07/1995
• Issued: 01/07/1997
• Est. Priority Date: 06/27/1990
• Status: Expired due to Fees

• Current Assignee: Mark C. Koz
• Original Assignee: Mark C. Koz
• Inventors: Koz, Mark C.
• Primary Examiner(s): Peng, John K.
• Assistant Examiner(s): GRANT, CHRISTOPHER C
• Application Number:
  US08/484,298
• Time in Patent Office: 580 Days
• Field of Search: 348/571, 348/552, 348/554, 348/578, 348/844, 345/150, 345/186
• US Class Current: 348/552
• CPC Class Codes: G06F 3/14 Digital output to display device ; Cooperation and interconnection of the display device with other functional units
• CPC Class Codes: G09G 1/16 the pattern of rectangular co-ordinates extending over the whole area of the screen, i.e. television type raster
• CPC Class Codes: G09G 1/165 Details of a display terminal using a CRT, the details relating to the control arrangement of the display terminal and to the interfaces thereto details suitable for both CRT and flat panel G09G5/003; specific for a flat panel G09G3/2092
• CPC Class Codes: G09G 5/02 characterised by the way in which colour is displayed details of colour display specific for CRTs G09G1/28; specific for flat matrix panels other than liquid crystal displays G09G3/2003; specific for liquid crystal displays G09G3/3607
• CPC Class Codes: H04N 21/4113 PC
• CPC Class Codes: H04N 21/4143 embedded in a Personal Computer [PC]

Abstract

An assembly and delivery circuit and method of operation therefor which delivers a stream of pixel formatted digital video data as words to an internal bus of a host personal computer. The host personal computer receives and processes the words assembled and delivered by this circuit to present a video image on its display screen. The assembly and delivery circuit operates in conjunction with the host computer'"'"'s internal bus at a sufficient speed to permit a host personal computer having a sufficient operating speed to display either black and white images, or color television images at a real-time rate of thirty frames per second.

Claims

1. A video data transfer apparatus for assembling and rapidly transferring digital data words defining pixels of a video image to an internal bus of a cooperating personal computer which includes a display screen upon which the personal computer may display the video image received from said video data transfer apparatus;

the video data transfer apparatus receiving digital data words of the video image from a video signal conversion subsystem which converts an analog television signal into the digital data words;

said video data transfer apparatus comprising;

a video memory which receives the digital data words of the video image from the video signal conversion subsystem and which stores the received digital data words;

a video data transfer controller which transmits a signal that informs the personal computer when digital data words of the video image are present in said video memory, and which subsequently receives from the personal computer a command to transfer, to the internal bus of the personal computer, digital data words of the video image; and

word buffers that operate in response to load signals received from the video data transfer controller for respectively receiving from said video memory and temporarily storing digital data words of the video image, and then the word buffers, in response to a transfer signal received from the video data transfer controller, transfer, to the internal bus of the personal computer, the digital data words of the video image, which is present in the word buffers, whereby the personal computer may display the video image of the analog television signal on the display screen in real-time.

2. The video data transfer apparatus of claim 1 wherein said word buffers in said video data transfer apparatus comprise four eight-bit buffers adapted to transfer thirty-two data bits for use in the cooperating personal computer which uses data words of thirty-two bits.

3. The video data transfer apparatus of claim 2 wherein all but one of said word buffers are latched uni-directional buffers, and the remaining one of said word buffers is a bi-directional buffer adapted to receive control signals from the cooperating personal computer.

4. The video data transfer apparatus of claim 1 wherein said video data transfer controller includes:

a programmable gate array logic integrated circuit for transmitting the signal that informs the personal computer when digital data words are present in said video memory, for receiving the command from the personal computer to transfer to the internal bus of the personal computer digital data words of the video image, and for producing both the load signals and the transfer signal to which said word buffers respond; and

a read only memory for storing software instructions loaded into said programmable gate array logic integrated circuit.

5. The video data transfer apparatus of claim 4 wherein said read only memory also stores a driver program that is loaded into and executed by the cooperating personal computer to effect picture control and decoding operations of the personal computer.

6. The video data transfer apparatus of claim 1 wherein said video data transfer controller includes a read only memory for storing a driver program that is loaded into and executed by the cooperating personal computer to effect picture control and decoding operations of the personal computer.

7. The video data transfer apparatus of claim 1 wherein all but one of said word buffers are latched uni-directional buffers, and the remaining one of said word buffers is a bi-directional buffer adapted to receive control signals from the cooperating personal computer.

8. The video data transfer apparatus of claim 1 wherein each digital data word defines a pixel of a black and white video image.

9. The video data transfer apparatus of claim 1 wherein each digital data word defines a pixel of a color video image.

10. In an apparatus for displaying on a display screen of a personal computer a video image specified by digital data words defining pixels of the video image, the apparatus including a video data transfer apparatus which receives digital data words of the video image from a video signal conversion subsystem that converts an analog television signal into the digital data words, said video data transfer apparatus also assembling and rapidly transferring digital data words directly to an internal bus of the personal computer, the improvement comprising:

a video memory which receives the digital data words of the video image from the video signal conversion subsystem and which stores the received digital data words;

a video data transfer controller which transmits a signal that informs the personal computer when digital data words of the video image are present in said video memory, and which subsequently receives from the personal computer a command to transfer, to the internal bus of the personal computer, digital data words of the video image; and

word buffers that operate in response to load signals received from the video data transfer controller for respectively receiving from said video memory and temporarily storing digital data words of the video image, and then the word buffers, in response to a transfer signal received from the video data transfer controller, transfer, to the internal bus of the personal computer, the digital data words of the video image, which is present in the word buffers, whereby the personal computer may display the video image of the analog television signal on the display screen in real-time.

11. The video data transfer apparatus of claim 10 wherein said video data transfer controller includes:

a programmable gate array logic integrated circuit for transmitting the signal that informs the personal computer when digital data words are present in said video memory, for receiving the command from the personal computer to transfer to the internal bus of the personal computer digital data words of the video image, and for producing both the load signals and the transfer signal to which said word buffers respond; and

a read only memory for storing software instructions loaded into said programmable gate array logic integrated circuit.

12. The video data transfer apparatus of claim 11 wherein said read only memory also stores a driver program that is loaded into and executed by the cooperating personal computer to effect picture control and decoding operations of the personal computer.

13. The video data transfer apparatus of claim 10 wherein said video data transfer controller includes a read only memory for storing a driver program that is loaded into and executed by the cooperating personal computer to effect picture control and decoding operations of the personal computer.

14. The video data transfer apparatus of claim 10 wherein said word buffers in said video data transfer apparatus comprise four eight-bit buffers adapted to transfer thirty-two data bits for use in the cooperating personal computer which uses data words of thirty-two bits.

15. The video data transfer apparatus of claim 14 wherein all but one of said word buffers are latched uni-directional buffers, and the remaining one of said word buffers is a bi-directional buffer adapted to receive control signals from the cooperating personal computer.

16. The video data transfer apparatus of claim 10 wherein all but one of said word buffers are latched uni-directional buffers, and the remaining one of said word buffers is a bi-directional buffer adapted to receive control signals from the cooperating personal computer.

17. The video data transfer apparatus of claim 10 wherein each digital data word defines a pixel of a black and white video image.

18. The video data transfer apparatus of claim 10 wherein each digital data word defines a pixel of a color video image.

19. A method for receiving digital data words defining pixels of a video image from a video signal conversion subsystem which converts an analog television signal into the digital data words;

and for assembling and rapidly transferring the digital data words directly to an internal bus of a cooperating personal computer which includes a display screen upon which the personal computer may display the received video image;

said method comprising the steps of;

receiving digital data words of the video image from the video signal conversion subsystem and storing the received digital data words into a video memory;

after digital data words are present in the video memory, transmitting a signal to the personal computer which informs the personal computer that the digital data words are present; and

repetitively receiving commands from the personal computer to transfer, to the internal bus of the personal computer, digital data words of the video image, and in response to each command received from the personal computer;

transferring digital data words of the video image from the video memory into word buffers until the word buffers have received, and are respectively temporarily storing, at least one digital data word of the video image; and

transferring at least one digital data word of the video image, which is present in the word buffers, from the word buffers to the internal bus of the personal computer;

until the digital data words of the video image have been transferred from the video memory to the internal bus of the personal computer, whereby the personal computer may display the video image of the analog television signal on the display screen in real-time.

20. The method of claim 19 wherein the internal bus of the cooperating personal computer uses data words having thirty-two bits.

21. The method of claim 20 wherein each digital data word defining a pixel of the video image contains eight bits.

22. The method of claim 20 wherein each digital data word defining a pixel of the video image contains twenty-four bits.

23. The method of claim 19 wherein each digital data word defines a pixel of a black and white video image.

24. The method of claim 19 wherein each digital data word defines a pixel of a color video image.

25. A video data transfer apparatus for assembling and rapidly transferring digital data words defining pixels of a video image to a bus of a cooperating computer which includes a display screen upon which the computer may display the video image received from said video data transfer apparatus;

said video data transfer apparatus comprising;

a video memory which receives the digital data words of the video image and which stores the received digital data words;

a video data transfer controller which transmits a signal that informs the computer when digital data words of the video image are present in said video memory, and which subsequently receives from the computer a command to transfer, to the bus of the computer, digital data words of the video image; and

word buffers that operate in response to load signals received from the video data transfer controller for respectively receiving from said video memory and temporarily storing digital data words of the video image, and then the word buffers, in response to a transfer signal received from the video data transfer controller, transfer, to the bus of the computer, the digital data words of the video image, which is present in the word buffers.

26. The video data transfer apparatus of claim 25 wherein said video data transfer controller includes:

a programmable gate array logic integrated circuit for transmitting the signal that informs the computer when digital data words are present in said video memory, for receiving the command from the computer to transfer to the bus of the computer digital data words of the video image, and for producing both the load signals and the transfer signal to which said word buffers respond; and

a read only memory for storing software instructions loaded into said programmable gate array logic integrated circuit.

27. The video data transfer apparatus of claim 26 wherein said read only memory also stores a driver program that is loaded into and executed by the cooperating computer to effect picture control and decoding operations of the computer.

28. The video data transfer apparatus of claim 26 wherein said video data transfer controller includes a read only memory for storing a driver program that is loaded into and executed by the cooperating computer to effect picture control and decoding operations of the computer.

29. The video data transfer apparatus of claim 26 wherein said word buffers in said video data transfer apparatus comprise four eight-bit buffers adapted to transfer thirty-two data bits for use in the cooperating computer which uses data words of thirty-two bits.

30. The video data transfer apparatus of claim 29 wherein all but one of said word buffers are latched uni-directional buffers, and the remaining one of said word buffers is a bi-directional buffer adapted to receive control signals from the cooperating computer.

31. The video data transfer apparatus of claim 26 wherein all but one of said word buffers are latched uni-directional buffers, and the remaining one of said word buffers is a bi-directional buffer adapted to receive control signals from the cooperating computer.

32. The video data transfer apparatus of claim 26 wherein each digital data word defines a pixel of a black and white video image.

33. The video data transfer apparatus of claim 26 wherein each digital data word defines a pixel of a color video image.

34. In an apparatus for displaying on a display screen of a computer a video image specified by digital data words defining pixels of the video image, the apparatus including a video data transfer apparatus which receives digital data words of the video image for assembling and rapidly transferring digital data words directly to a bus of the computer, the improvement comprising:

a video memory which receives the digital data words of the video image and which stores the received digital data words;

a video data transfer controller which transmits a signal that informs the computer when digital data words of the video image are present in said video memory, and which subsequently receives from the computer a command to transfer, to the bus of the computer, digital data words of the video image; and

word buffers that operate in response to load signals received from the video data transfer controller for respectively receiving from said video memory and temporarily storing digital data words of the video image, and then the word buffers, in response to a transfer signal received from the video data transfer controller, transfer, to the bus of the computer, the digital data words of the video image, which is present in the word buffers.

35. The video data transfer apparatus of claim 34 wherein said video data transfer controller includes:

a programmable gate array logic integrated circuit for transmitting the signal that informs the computer when digital data words are present in said video memory, for receiving the command from the computer to transfer to the bus of the computer digital data words of the video image, and for producing both the load signals and the transfer signal to which said word buffers respond; and

a read only memory for storing software instructions loaded into said programmable gate array logic integrated circuit.

36. The video data transfer apparatus of claim 35 wherein said read only memory also stores a driver program that is loaded into and executed by the cooperating computer to effect picture control and decoding operations of the computer.

37. The video data transfer apparatus of claim 34 wherein said video data transfer controller includes a read only memory for storing a driver program that is loaded into and executed by the cooperating computer to effect picture control and decoding operations of the computer.

38. The video data transfer apparatus of claim 34 wherein said word buffers in said video data transfer apparatus comprise four eight-bit buffers adapted to transfer thirty-two data bits for use in the cooperating computer which uses data words of thirty-two bits.

39. The video data transfer apparatus of claim 38 wherein all but one of said word buffers are latched uni-directional buffers, and the remaining one of said word buffers is a bi-directional buffer adapted to receive control signals from the cooperating computer.

40. The video data transfer apparatus of claim 34 wherein all but one of said word buffers are latched uni-directional buffers, and the remaining one of said word buffers is a bi-directional buffer adapted to receive control signals from the cooperating computer.

41. The video data transfer apparatus of claim 34 wherein each digital data word defines a pixel of a black and white video image.

42. The video data transfer apparatus of claim 34 wherein each digital data word defines a pixel of a color video image.

43. A method for receiving digital data words defining pixels of a video image;

and for assembling and rapidly transferring the digital data words directly to a bus of a cooperating computer which includes a display screen upon which the computer may display the received video image;

said method comprising the steps of;

receiving digital data words of the video image and storing the received digital data words into a video memory;

after digital data words are present in the video memory, transmitting a signal to the computer which informs the computer that the digital data words are present; and

repetitively receiving commands from the computer to transfer, to the bus of the computer, digital data words of the video image, and in response to commands received from the computer;

transferring digital data words of the video image from the video memory into word buffers until the word buffers have received, and are respectively temporarily storing, at least one digital data word of the video image; and

transferring at least one digital data word of the video image, which is present in the word buffers, from the word buffers to the bus of the computer;

until the digital data words of the video image have been transferred from the video memory to the bus of the computer.

44. The method of claim 43 wherein the bus of the cooperating computer uses data words having thirty-two bits.

45. The method of claim 44 wherein each digital data word defining a pixel of the video image contains eight bits.

46. The method of claim 44 wherein each digital data word defining a pixel of the video image contains twenty-four bits.

47. The method of claim 43 wherein each digital data word defines a pixel of a black and white video image.

48. The method of claim 43 wherein each digital data word defines a pixel of a color video image.