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Network intermediate system with message passing architecture

  • US 5,592,622 A
  • Filed: 05/10/1995
  • Issued: 01/07/1997
  • Est. Priority Date: 05/10/1995
  • Status: Expired due to Term
First Claim
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1. An apparatus for transferring large amounts of input/output data among a plurality of processors having respective local memories, comprising:

  • a bus interconnecting the plurality of processors;

    a plurality of bus interface devices, coupled to the bus and to corresponding processors in the plurality of processors, a first bus interface device in the plurality of bus interface devices which originates a transfer without first obtaining permission to transfer to a destination device includinga command list storing a list of commands which characterize transfers of data from local memory across the bus,a bus data buffer which buffers data subject of a command being executed between local memory and the bus,and a second bus interface device in the plurality of bus interface devices which receives a transfer includinga free buffer list storing pointers to free buffers in local memory into which data may be loaded from the bus,a receive list storing pointers to buffers in local memory loaded with data from the bus, andan inbound data buffer which buffers data subject of a transfer addressed to the second bus interface between the bus and free buffers in local memory.

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