Self-calibrating RC oscillator
First Claim
Patent Images
1. An RC oscillator comprising:
- a core oscillator having an input terminal supplying a signal for adjusting a core oscillator frequency and having an output terminal generating the core oscillator frequency;
a frequency counter coupled to the core oscillator to receive the core oscillator frequency;
a ramp and hold circuit coupled to the frequency counter by a control signal line;
an RC network coupled to the ramp and hold circuit, the RC network including a capacitor and a resistor, the resistor conducting a controlled current;
a comparator having a first input terminal coupled to the ramp and hold circuit, a second input terminal coupled to a reference voltage source and an output terminal;
a charge pump having an input terminal coupled to the output terminal of the comparator, a control terminal coupled to the frequency counter by a control signal line and an output terminal coupled to the core oscillator.
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Abstract
An RC oscillator includes an RC network for forming a time constant equal to the RC product. However, this RC time constant is not used in the manner of a typical RC network to set the frequency of oscillation. Instead, the RC oscillator disclosed herein includes a separate oscillator, such as a voltage-controlled oscillator (VCO), and uses the RC time constant to compare with the oscillator-generated period and to adjust the frequency of the overall RC oscillator circuit in accordance with the comparison. The RC oscillator is self-calibrating.
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Citations
33 Claims
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1. An RC oscillator comprising:
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a core oscillator having an input terminal supplying a signal for adjusting a core oscillator frequency and having an output terminal generating the core oscillator frequency; a frequency counter coupled to the core oscillator to receive the core oscillator frequency; a ramp and hold circuit coupled to the frequency counter by a control signal line; an RC network coupled to the ramp and hold circuit, the RC network including a capacitor and a resistor, the resistor conducting a controlled current; a comparator having a first input terminal coupled to the ramp and hold circuit, a second input terminal coupled to a reference voltage source and an output terminal; a charge pump having an input terminal coupled to the output terminal of the comparator, a control terminal coupled to the frequency counter by a control signal line and an output terminal coupled to the core oscillator. - View Dependent Claims (2, 3, 4, 5, 6)
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7. An RC oscillator comprising:
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a bias circuit having an input terminal coupled to an RC network resistor, a first output terminal coupled to a ramp line and a second output terminal coupled to a bias line, the bias circuit including; a first P-channel transistor having a source terminal coupled to a voltage source, a drain terminal, and a gate terminal coupled to the drain terminal; a second P-channel transistor coupled to the first P-channel transistor in a current mirror configuration having a source terminal coupled to the voltage source, a drain terminal, and a gate terminal coupled to the gate terminal of the first P-channel transistor; a third P-channel transistor having a source terminal coupled to the voltage source, a drain terminal coupled to the bias line, and a gate terminal coupled to the gate terminals of the first and second P-channel transistors; a first N-channel transistor having a drain terminal coupled to the drain terminal of the first P-channel transistor, a source terminal coupled to a ground reference, and a gate terminal coupled to an input voltage line; a second N-channel transistor having a drain terminal coupled to the drain terminal of the second P-channel transistor, a source terminal coupled to the ground reference, and a gate terminal coupled to an RC network capacitor; a hold capactor having a first terminal coupled to the ground reference and a second terminal; a first switch coupled to the second terminal of the hold capacitor and selectively coupling the hold capacitor to the bias line or the ramp line; a ramp and hold circuit having an input terminal coupled to the ramp line, a control terminal and an output terminal coupled to the RC network capacitor and a hold line; a switched transistor circuit including; a third N-channel transistor having a source terminal coupled to the ground reference, a drain terminal coupled to the bias line and a gate terminal; a second switch coupled to the gate terminal of the third N-channel transistor and selectively coupling the gate terminal of the third N-channel transistor to the hold line or the ramp line; and a third switch coupled to the gate terminal of the third N-channel transistor and selectively coupling the gate terminal of the third N-channel transistor to the drain terminal of the third N-channel transistor or the ramp line; a charge pump having an input terminal coupled to the drain terminal of the third N-channel transistor, a control terminal and an output terminal coupled to a pump line; a core oscillator having an input terminal coupled to the pump line and an output terminal; and a frequency counter having an input terminal coupled to the core oscillator output terminal, a first control terminal coupled to the ramp and hold circuit control terminal, and a second control terminal coupled to the charge pump control terminal. - View Dependent Claims (8, 9)
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10. An RC oscillator comprising:
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an RC network for setting an RC time constant; a core oscillator for generating a timing signal at a controlled frequency; a comparator coupled to the RC network and the core oscillator for comparing an indicator of the controlled frequency to an indicator of the RC time constant; and means responsive to the comparator for adjusting the frequency of the core oscillator. - View Dependent Claims (11, 12, 13)
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14. An RC oscillator comprising:
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a first input terminal coupled to an input resistance R; a second input terminal coupled to an input capacitance C; a ramp and hold circuit coupled to the first and second input terminals for establishing a time constant proportional to a multiplication product of the input resistance R and the input capacitance C; an oscillator generating an output timing signal having a period of oscillation established by a control input signal; a comparator coupled to the ramp and hold circuit and to the oscillator to compare an integer multiple of periods of the output timing signal to the time constant; and a control signal generator coupled to the oscillator and responsive to the comparator means by generating an incremental signal to the control input signal to adjust the period of oscillation. - View Dependent Claims (15, 16, 17)
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18. An RC oscillator comprising:
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a first input terminal coupled to an input resistance R; a second input terminal coupled to an input capacitance C; a time constant means coupled to the first and second input terminals for establishing a time constant proportional to a multiplication product of the input resistance R and the input capacitance C; an oscillator means for generating an output timing signal having a period of oscillation established by a control input signal; a comparator means coupled to the time constant means and the oscillator means for comparing an integer multiple of periods of the output timing signal to the time constant; and control signal means coupled to the oscillator means and responsive to the comparator means for generating an incremental signal to the control input signal to adjust the period of oscillation. - View Dependent Claims (19, 20, 21)
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22. An RC oscillator comprising:
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a resistance R; a capacitance C; time constant means coupled to the resistance R and the capacitance C for establishing a time constant proportional to the multiplication product of the resistance R and the capacitance C; an oscillator means for generating a timing signal having a period of oscillation established by a control signal; a comparator means coupled to the time constant means and coupled to the oscillator means for comparing an integer multiple of periods of the timing signal to the time constant; and means coupled to the oscillator means and responsive to the comparator means for generating a control signal to adjust the period of oscillation of the timing signal, the control signal begin generated by incrementing a previous version of the control signal. - View Dependent Claims (23, 24, 25, 26, 27)
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28. A method for generating a periodic electrical signal comprising the process steps of:
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using a controlled oscillator to convert a d.c. power supply voltage to a time dependent waveform having a variable period of oscillation; using integer multiple transitions of the controlled oscillator to establish successive states in a control sequence; sensing an input resistance R; sensing an input capacitance C; sensing a reference voltage; using the input capacitance C, the input resistance R and the reference voltage to generate a time dependent voltage waveform having a slope (dV/dt) inversely proportional to a time constant having a value of the product R times C, the time dependent control sequence being initialized by the control sequence; sampling a sample voltage of the time dependant voltage waveform during a selected interval of the control sequence; comparing the sample voltage to the reference voltage; adjusting the period of oscillation in incremental steps in response to the comparing step.
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29. A method of generating a timing signal comprising the steps of:
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sensing an input resistance R; sensing an input capacitance C; establishing a time constant proportional to the product of the input resistance R and the input capacitance C; generating the timing signal having a period of oscillation set by a control signal; comparing an integer multiple of periods of the timing signal to the time constant; and updating the control signal to adjust the period of oscillation in response to the comparison step.
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30. An RC oscillator comprising:
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an RC network including a network resistor and a network capacitor; a bias circuit coupled to the network resistor, the bias circuit including a current mirror for mirroring the current through the network resistor; a ramp and hold circuit coupled to the bias circuit to receive a mirrored current and coupled to the network capacitor, the ramp and hold circuit having a control signal input line; a comparator having a first input terminal coupled to the bias circuit to receive a signal indicative of the current through the network resistor, a second input terminal coupled to the ramp and hold circuit to receive a signal indicative of the voltage across the network capacitor, and an output terminal; a charge pump having an input terminal coupled to the bias circuit to receive a signal indicative of the current through the network resistor, a first control terminal, a second control terminal coupled to the comparator output terminal, the charge pump including a pump capacitor; an oscillator having an input terminal coupled to the pump capacitor and an output terminal; a frequency counter having an input terminal coupled to the oscillator output terminal and a plurality of output lines; and a state decoder to decode the count of the frequency counter having a plurality of input lines coupled to the output lines of the frequency counter and having a first output control line coupled to the ramp and hold circuit control signal input line and a second output control line coupled to the charge pump first control terminal. - View Dependent Claims (31, 32, 33)
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Specification