N-stage ring connected voltage controlled oscillator

• US 5,594,391 A
• Filed: 04/19/1994
• Issued: 01/14/1997
• Est. Priority Date: 04/21/1993
• Status: Expired due to Term

• Current Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Original Assignee: Kabushiki Kaisha Toshiba (Toshiba Corporation)
• Inventors: Yoshizawa, Akihiko
• Primary Examiner(s): Pascal, Robert
• Assistant Examiner(s): KINKEAD, ARNOLD M
• Application Number:
  US08/229,791
• Time in Patent Office: 1,001 Days
• Field of Search: 331/57, 331/25, 331/1 A, 331/108 D, 331/176, 327/392, 327/393, 327/394, 327/395, 327/396, 327/276, 327/278, 327/281, 327/285, 327/288, 327/277, 327/261, 327/264, 327/284, 330/264
• US Class Current: 331/57
• CPC Class Codes: H03K 3/0315 Ring oscillators
• CPC Class Codes: H03K 3/354 Astable circuits

Abstract

A VCO includes an oscillator and a controller for controlling the operation of the oscillator. The oscillator is formed by connecting odd number of stages of delay circuits in a ring form. The controller creates a second control voltage based on an input first control voltage. The second control voltage is set in a symmetrical relation to the first control voltage with respect to an intermediate potential between the power supply and the ground set as a reference. Each of the delay circuits includes an inverter, first and second current control circuits, and first and second current value setting circuits. The inverter includes a first transistor of first conductivity type and a second transistor of second conductivity type to receive and output a signal. The first current control circuit is connected between the first transistor and the ground, for controlling a current flowing in the first transistor when the first transistor is set in the conductive state according to the first control voltage. The first current value setting circuit sets the minimum value of the current flowing in the first transistor. The second current control circuit is connected between the second transistor and the power supply, for controlling a current flowing in the second transistor when the second transistor is set in the conductive state according to the second control voltage. The second current value setting circuit sets the minimum value of the current flowing in the second transistor.

Claims

1. A voltage controlled oscillator comprising:

an odd number of stages of delay circuits connected in a ring form, each for delaying a signal input thereto and outputting the signal;

each of said delay circuits including;

a first transistor of first conductivity type whose current path is connected at one end to a first potential supplying source and whose conduction state is controlled by an input signal;

a second transistor of the first conductivity type whose current path is connected at one end to the other end of the current path of said first transistor and whose conduction state is controlled by the input signal;

a third transistor of second conductivity type whose current path is connected at one end to the other end of the current path of said second transistor and whose conduction state is controlled by the input signal;

a fourth transistor of the second conductivity type which is connected between the other end of the current path of said third transistor and a second potential supplying source and whose conduction state is controlled by the input signal;

a fifth transistor of the first conductivity type which is connected between said first potential supplying source and a connection node of said first and second transistors and whose conduction state is controlled by a first control voltage;

a sixth transistor of the second conductivity type which is connected between a connection node of said third and fourth transistors and said second potential supplying source and whose conduction state is controlled by a second control voltage which is symmetrical to the first control voltage with respect to an intermediate potential between the potentials of said second and first potential supplying source;

a seventh transistor of the first conductivity type which is connected between said first potential supplying source and the connection node of said third and fourth transistors and whose conduction state is controlled by the input signal; and

an eighth transistor of the second conductivity type which is connected between the connection node of said first and second transistors and said second potential supplying source and whose conduction state is controlled by the input signal;

wherein a delayed input signal is output from a connection node of said second and third transistors.

2. A voltage controlled oscillator according to claim 1, further comprising inverting amplifier means supplied with the first control voltage for generating a second control voltage which is set in a symmetrical relation to the first control voltage with respect to an intermediate potential between the potential of said first potential supplying source and the potential of said second potential supplying source set as a reference;

an oscillation frequency of the oscillator being controlled by changing the first control voltage.

3. A voltage controlled oscillator according to claim 2, wherein said inverting amplifier means includes a first resistor having one end applied with the first control voltage;

an inverter having an input terminal connected to the other end of said first resistor and generating an output for controlling the conduction state of said sixth transistor of each of said delay circuits; and

a second resistor connected at one end to the input terminal of said inverter and connected at the other end to an output terminal of said inverter.

4. A voltage controlled oscillator according to claim 1, wherein one of said odd number of stages of delay circuits connected in a ring form includes a ninth transistor of the first conductivity type whose current path is connected at one end to said first potential supplying source and whose conduction state is controlled by the input signal;

a tenth transistor of the first conductivity type whose current path is connected at one end to the other end of the current path of said ninth transistor and whose conduction state is controlled by the input signal;

an eleventh transistor of the second conductivity type whose current path is connected at one end to the other end of the current path of said tenth transistor and Whose conduction state is controlled by the input signal;

a twelfth transistor of the second conductivity type which is connected between the other end of the current path of said eleventh transistor and said second potential supplying source and whose conduction state is controlled by the second control voltage;

a thirteenth transistor of the first conductivity type whose current path is connected at one end to said first potential supplying source and connected at the other end to a connection node of said eleventh and twelfth transistors and whose conduction state is controlled by the input signal;

a fourteenth transistor of the second conductivity type whose current path is connected at one end to a connection node of said ninth and tenth transistors and connected at the other end to said second potential supplying source and whose conduction state is controlled by the input signal;

a fifteenth transistor of the first conductivity type whose current path is connected in parallel with said ninth transistor and whose conduction state is controlled by the first control voltage;

a sixteenth transistor of the second conductivity type whose current path is connected at one end to a connection node of said tenth and eleventh transistors and connected at the other end to said first potential supplying source and whose conduction state is controlled by an oscillation control signal for controlling the oscillating operation; and

a seventeenth transistor whose current path is connected in parallel with said twelfth transistor and whose conduction state is controlled by the oscillation control signal;

a delay signal of the input signal being output from the connection node of said tenth and eleventh transistors.

5. A voltage controlled oscillator according to claim 4, further comprising control means supplied with the first control voltage for generating a second control voltage which is set in a symmetrical relation to the first control voltage with respect to an intermediate potential between said second potential supplying source and said first potential supplying source set as a reference when an oscillation control signal is set at a significant level;

the oscillation frequency being controlled by changing the first control voltage.

6. A voltage controlled oscillator according to claim 5, wherein said control means includes a first resistor having one end applied with the first control voltage;

a NAND gate having a first input terminal connected to the other end of said first resistor, a second input terminal supplied with an inverted signal of the oscillation control signal, and an output terminal for outputting the second control voltage;

a second resistor connected between the first input terminal and the output terminal of said NAND gate; and

means for applying the second control voltage to each of said delay circuits when the oscillation control signal is set at the significant level and supplying the potential of said first potential supplying source as the second control voltage at the other time.

7. A voltage controlled oscillator comprising:

an odd number of stages of delay circuits connected in a ring form, each for delaying a signal input thereto and outputting the signal;

each of said delay circuits including;

a first transistor of first conductivity type having a current path connected at one end to a first potential supplying source and a conduction state controlled by a control voltage;

a second transistor of the first conductivity type having a current path connected at one end to the other end of the current path of said first transistor and having a conduction state controlled by an input signal;

a third transistor of second conductivity type which is connected between the other end of the current path of said second transistor and a second potential supplying source and having a conduction state controlled by the input signal;

a fourth transistor of the second conductivity type having a current path connected at one end to said second potential supplying source and connected at the other end to a connection node of said first and second transistors and conduction state controlled by the input signal; and

a fifth transistor of the first conductivity type having a current path connected in parallel with the current path of said first transistor and a conduction state controlled by an input signal;

wherein a delayed signal of the input signal is output from a connection node of said second and third transistors.

8. A voltage controlled oscillator according to claim 7, further comprising a sixth transistor of the second conductivity type whose current path is connected between said third transistor and said second potential supplying source and whose conduction state is controlled by the input signal;

and a seventh transistor of the second conductivity type whose current path is connected at one end to a connection node of said sixth and third transistors and connected at the other end to said first potential supplying source and whose conduction state is controlled by the input signal.

9. A voltage controlled oscillator comprising:

an odd number of stages of delay circuits connected in a ring form, each for delaying a signal input thereto and outputting the signal;

each of said delay circuits including;

a first transistor of first conductivity type having a current path connected at one end to a first potential supplying source and a conduction state controlled by a control voltage;

a second transistor of the first conductivity type having a current path connected at one end to the other end of the current path of said first transistor and a conduction state controlled by an input signal;

a third transistor of second conductivity type connected between the other end of the current path of said second transistor and a second potential supplying source and having a conduction state controlled by the input signal;

a fourth transistor of the second conductivity type having a current path connected at one end to said second potential supplying source and connected at the other end to a connection node of said first and second transistors and conduction state controlled by the input signal;

a fifth transistor of the second conductivity type having a current path connected between said second potential supplying source and said third transistor, said fifth transistor being set in conductive state by the potential of said first potential supplying source; and

a sixth transistor of the first conductivity type having a current path connected at one end to a connection node of said fifth and third transistors and connected at the other end to said first potential supplying source and having a conduction state controlled by the input signal;

wherein a delayed signal of the input signal is output from a connection node of said second and third transistors.