Apparatus and method for testing circuits by the response of a phase-locked loop
First Claim
1. Apparatus for determining electrical characteristics of a circuit under test, wherein said apparatus comprises:
- a computing system;
an input oscillator providing an output at an input frequency of oscillation;
a phase-locked loop including a phase comparator, a loop filter, and a voltage controlled oscillator, wherein said phase comparator has first and second inputs, with said first input being connected to an output of said voltage controlled oscillator, wherein said voltage controlled oscillator has a freerunning frequency of oscillation at which said phase-locked loop operates when said input oscillator is not connected to said phase comparator, wherein said phase-locked loop oscillates at said input frequency when said input oscillator is connected to said phase comparator, wherein said voltage controlled oscillator includes a frequency control node at which said freerunning frequency of oscillation is varied by attaching an electrical impedance extending to electrical ground;
first connection means connecting said input oscillator with said second input of said phase comparator;
second connection means connecting a node of said circuit under test with said frequency control node;
detection means measuring an output signal of said loop filter;
switching means, operable by said computing system, for closing an electrical connection to said phase-locked loop to begin generating data relative to said circuit under test; and
an analog to digital converter responding to an output signal from said detection means, wherein said analog to digital converter produces coded signals indicating levels of said output signal of said loop filter at sampling times synchronized with operation of said switching means, so that said sampling times occur when said electrical connection to said phase lock loop is closed and at a plurality of equal time intervals thereafter.
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Abstract
A PLL (phase-locked loop) circuit is used in apparatus for testing individual circuits in circuit devices. The PLL circuit operates at an input frequency provided by the output of an input oscillator when this oscillator is connected to one of the inputs of a phase comparator within the PLL circuit. When this connection is not made, the PLL circuit operates at a freerunning frequency, which is varied by connecting a circuit under test with a frequency controlling node present within a voltage-controlled oscillator in the PLL circuit. In a first mode of operation, the circuit under test is initially connected to the frequency controlling node, but the input oscillator is not connected to the phase comparator. When the input oscillator is so connected, the frequency of oscillations moves from a freerunning frequency associated with the circuit under test to the input frequency. During this transient behavior, the output of a loop filter within the PLL circuit is periodically sampled and encoded using an ADC (analog to digital converter) circuit. In a second mode of operation, the circuit under test is initially not connected to the PLL circuit, but the input oscillator is initially so connected. When the circuit under test is connected, transient behavior is caused, which is again recorded using the ADC. In either case, codes generated by the ADC circuit are read by the processor of a computing system for comparison with codes similarly generated using a circuit known not to have fault conditions.
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Citations
9 Claims
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1. Apparatus for determining electrical characteristics of a circuit under test, wherein said apparatus comprises:
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a computing system; an input oscillator providing an output at an input frequency of oscillation; a phase-locked loop including a phase comparator, a loop filter, and a voltage controlled oscillator, wherein said phase comparator has first and second inputs, with said first input being connected to an output of said voltage controlled oscillator, wherein said voltage controlled oscillator has a freerunning frequency of oscillation at which said phase-locked loop operates when said input oscillator is not connected to said phase comparator, wherein said phase-locked loop oscillates at said input frequency when said input oscillator is connected to said phase comparator, wherein said voltage controlled oscillator includes a frequency control node at which said freerunning frequency of oscillation is varied by attaching an electrical impedance extending to electrical ground; first connection means connecting said input oscillator with said second input of said phase comparator; second connection means connecting a node of said circuit under test with said frequency control node; detection means measuring an output signal of said loop filter; switching means, operable by said computing system, for closing an electrical connection to said phase-locked loop to begin generating data relative to said circuit under test; and an analog to digital converter responding to an output signal from said detection means, wherein said analog to digital converter produces coded signals indicating levels of said output signal of said loop filter at sampling times synchronized with operation of said switching means, so that said sampling times occur when said electrical connection to said phase lock loop is closed and at a plurality of equal time intervals thereafter. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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Specification