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Method and apparatus for programming embedded memories of a variety of integrated circuits using the IEEE test access port

  • US 5,596,734 A
  • Filed: 12/19/1995
  • Issued: 01/21/1997
  • Est. Priority Date: 12/17/1993
  • Status: Expired due to Term
First Claim
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1. In an integrated circuit having processor means for processing instructions, storage means comprising one of an embedded memory and an on-chip cache and a memory unit having a memory bus coupled to the storage means for enabling access to the storage means, an apparatus is provided for programming memory locations of the storage means, the apparatus comprising:

  • a shift register disposed within the integrated circuit having a command field, an address field and a data field;

    an input/output means disposed within the integrated circuit and coupled between an external system outside of the integrated circuit and the shift register for transmission of signals comprising an instruction specifying a write command, an address specifying a memory location within the storage means and data between the external system and the command field, the address field and the data field of the shift register, respectively;

    first, second and third registers disposed within the memory unit and being coupled to the shift register for receiving from the command field, address field and data field of the shift register the instruction, address and data, respectively;

    executable cede stored within the storage means for executing the instruction stored within the first register and writing the data stored in the third register to the memory location specified by the address stored in the second register; and

    an interrupt unit coupled to the first register of the memory unit and to the processor means of the integrated circuit for interrupting operation of the processor means upon receipt of the instruction by the first register and transferring processor control to the executable code stored in the storage means.

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