Virtual interconnections for reconfigurable logic systems
DCFirst Claim
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1. A reconfigurable electronic system comprising:
- a plurality of reprogrammable logic modules, each logic module having a plurality of pins for communicating signals between logic modules;
inter-module connections between pins of different logic modules; and
a configurer to configure each logic module to define a partition of a specified target circuit with interconnections between the partitions of the target circuit being provided through pins and inter-module connections, a partition of the configured target circuit having a number of interconnections to other partitions that exceeds the number of pins on the logic module and the logic module being configured to communicate through virtual interconnections in a time-multiplexed fashion through at least one pin, the inter-module communications including interconnections which extend through intermediate reconfigurable logic modules.
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Abstract
A compilation technique overcomes device pin limitations using virtual interconnections. Virtual interconnections overcome pin limitations by intelligently multiplexing each physical wire among multiple logical wires and pipelining these connections at the maximum clocking frequency. Virtual interconnections increase usable bandwidth and relax the absolute limits imposed on gate utilization in logic emulation systems employing Field Programmable Gate Arrays (FPGAs). A "softwire" compiler utilizes static routing and relies on minimal hardware support. The technique can be applied to any topology and FPGA device.
405 Citations
42 Claims
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1. A reconfigurable electronic system comprising:
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a plurality of reprogrammable logic modules, each logic module having a plurality of pins for communicating signals between logic modules; inter-module connections between pins of different logic modules; and a configurer to configure each logic module to define a partition of a specified target circuit with interconnections between the partitions of the target circuit being provided through pins and inter-module connections, a partition of the configured target circuit having a number of interconnections to other partitions that exceeds the number of pins on the logic module and the logic module being configured to communicate through virtual interconnections in a time-multiplexed fashion through at least one pin, the inter-module communications including interconnections which extend through intermediate reconfigurable logic modules. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
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27. A compiler for programming a reconfigurable electronic system comprising:
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a partitioner that partitions a target logic circuit into partitions to be configured into individual logic modules; a configurer to configure each logic module to create a partition of the target circuit with virtual interconnections between partitions of the target circuit corresponding to at least one common pin with signals along the virtual interconnections being time-multiplexed through common pins; and a router to configure the logic modules to route signals between logic modules through intermediate logic modules. - View Dependent Claims (28, 29, 30, 31)
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32. A method of compiling a reconfigurable electronic system, comprising the steps of:
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partitioning a target circuit into a plurality of partitions, each partition to be configured into an individual logic module having a plurality of pins; configuring each logic module to create a partition of the target circuit with virtual interconnections between partitions corresponding to at least one common pin with signals along the virtual interconnections being time-multiplexed through the at least one common pin; and configuring the logic modules to route signals between logic modules through intermediate logic modules. - View Dependent Claims (33)
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34. A reconfigurable electronic system comprising:
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a plurality of reprogrammable logic modules, each logic module having a plurality of pins for communicating signals between logic modules; inter-module connections between pins of different logic modules; and a configurer to configure each logic module to define a partition of a specified target circuit with interconnections between the partitions of the target circuit being provided through pins and inter-module connections, a partition of the configured target circuit having a number of interconnections to other partitions that exceeds the number of pins on the logic module and the logic module being configured to communicate through virtual interconnections in a time-multiplexed fashion through at least one pin, the electronic system including dedicated pins for providing a predetermined signal. - View Dependent Claims (35, 36, 37, 38, 39, 40, 41, 42)
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Specification