Method for fabricating a MOS transistor with two-layer inverse-T tungsten gate structure

• US 5,599,725 A
• Filed: 11/22/1994
• Issued: 02/04/1997
• Est. Priority Date: 06/18/1992
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Hsia, Liang-Choo, Dorleans, Fernand, Larsen, Gerald R., Schwartz, Geraldine C., Hsu, Louis L. C.
• Primary Examiner(s): Hearn, Brian E.
• Assistant Examiner(s): TRINH, MICHAEL MANH
• Application Number:
  US08/346,210
• Time in Patent Office: 805 Days
• Field of Search: 437/40, 437/44, 437/913, 437/200, 437/160, 148/DIG. 105
• US Class Current: 438/301
• CPC Class Codes: H01L 21/2256 through the applied layer
• CPC Class Codes: H01L 21/28079 the final conductor layer next to the insulator being a single metal, e.g. Ta, W, Mo, Al
• CPC Class Codes: H01L 21/28114 characterised by the sectional shape, e.g. T, inverted-T
• CPC Class Codes: H01L 21/32134 by liquid etching only
• CPC Class Codes: H01L 21/32136 using plasmas
• CPC Class Codes: H01L 29/6656 using multiple spacer layers, e.g. multiple sidewall spacers
• CPC Class Codes: H01L 29/66575 where the source and drain or source and drain extensions are self-aligned to the sides of the gate H01L29/66606 takes precedence

Abstract

The present invention is directed to a unique method for fabricating a silicon based MOS transistor having an inverse-T refractory metal gate structure. The gate fabricated according to this invention comprises a main CVD tungsten portion and a lower sputtered tungsten portion outwardly extending from the bottom of the CVD portion such that a cross section of the gate appears as an inverted "T". A Cl₂ /O₂ plasma etch is used to etch the CVD tungsten layer and a chemical etch is used to etch the sputtered tungsten layer to form the gate electrode. It has been discovered that sputtered tungsten is more resistant to Cl₂ /O₂ reactive ion etch than is CVD tungsten. The sputtered tungsten layer acts as a shield to protect the underlying gate oxide layer from ion damage throughout the fabrication process.

Claims

1. A method for fabricating a refractory metal gate electrode for a MOS transistor, comprising the steps of:

depositing a first layer of refractory metal having a first density on a gate oxide layer formed on a silicon substrate;

depositing a second layer of refractory metal having a second density on said first layer of refractory metal;

wherein said first density is lower than said second density;

etching said second layer to form an upper gate electrode portion; and

,

partially etching a thickness of said first layer to form a lower portion of said gate electrode that extends laterally beyond said upper gate electrode portion.

2. A method for fabricating a refractory metal gate electrode for a MOS transistor, as recited in claim 1 wherein said refractory metal is molybdenum.

3. A method for fabricating a refractory metal gate electrode for a MOS transistor, as recited in claim 1 wherein said refractory metal is tungsten.

8. A method for fabricating a refractory metal gate electrode for a MOS transistor, as recited in claim 1, further comprising the steps of:

implanting impurity ion dopants into a portion of said first layer using said upper gate electrode as a mask, said dopants being contained within said first layer during said implanting step;

annealing said silicon substrate to drive-in said dopant to form a shallow source region and a shallow drain region.

9. A method for fabricating a refractory metal gate electrode for a MOS transistor, as recited in claim 1, further comprising the steps of:

forming a first sidewall spacer about said upper gate electrode portion, said first sidewall spacer extending over a portion of said lower gate electrode portion;

forming a second sidewall spacer about said first sidewall spacer after said step of etching said first layer.

10. A method for fabricating a refractory metal gate electrode for a MOS transistor, as recited in claim 9, further comprising the steps of:

forming a silicide over said source region and said drain region;

implanting dopant into said silicide;

driving said dopant into said source region and said drain region, said dopant for reducing contact and series resistance.

11. A method for fabricating a refractory metal gate electrode for a MOS transistor, as recited in claim 1, wherein said first layer is thinner than said second layer.

4. A method for fabricating a refractory metal gate electrode for a MOS transistor, comprising the steps of:

depositing a first layer of refractory metal having a first density on a gate oxide layer formed on a silicon substrate;

depositing a second layer of refractory metal having a second density on said first layer of refractory metal;

wherein said first density is lower than said second density, wherein said first layer of refractory metal is deposited by sputter deposition and said second layer of refractory metal is deposited by chemical vapor deposition;

etching said second layer to form an upper gate electrode portion; and

,

partially etching a thickness of said first layer to form a lower portion of said gate electrode that extends laterally beyond said upper gate electrode portion.

5. A method for fabricating a tungsten gate electrode for a MOS transistor, comprising the steps of:

depositing a first layer of tungsten having a first density on a gate oxide layer formed on a silicon substrate;

depositing a second layer of tungsten having a second density on said first layer of tungsten metal;

wherein said first density is lower than said second density;

etching said second layer to form an upper gate electrode portion; and

,

partially etching a thickness of said first layer to form a lower portion of said gate electrode that extends laterally beyond said upper gate electrode portion, wherein said second tungsten layer is etched by Cl₂ /O₂ plasma, said first tungsten layer acting to stop said Cl₂ /O₂ plasma etch.

6. A method for fabricating a tungsten gate electrode for a MOS transistor, comprising the steps of:

depositing a first layer of tungsten having a first density on a gate oxide layer formed on a silicon substrate;

depositing a second layer of tungsten having a second density on said first layer of tungsten metal;

wherein said first density is lower than said second density;

etching said second layer to form an uppergate electrode portion; and

,

partially etching a thickness of said first layer to form a lower portion of said gate electrode that extends laterally beyond said upper gate electrode portion, wherein said first tungsten layer is etched by wet chemical etch.

7. A method for fabricating a refractory metal gate electrode for a MOS transistor, as recited in claim 6 wherein said wet chemical etch comprises KH₂ PO₄ /KOH/K₃ Fe(CN)₆.